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* [[28 nm process]] (from [[65 nm]]) | * [[28 nm process]] (from [[65 nm]]) | ||
* 20-30x performance | * 20-30x performance | ||
− | ** 600 MHz (3.33x, from 180 MHz) | + | ** 600 MHz (3.33x, from 180 MHz) |
** 12 SHAVE cores (from 8) | ** 12 SHAVE cores (from 8) | ||
− | ** | + | ** 5x per-core performance improvement |
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* Aggregate nominal 600 Mpixel/sec throughput | * Aggregate nominal 600 Mpixel/sec throughput | ||
* [[LEON4]] [[SPARC]] core (from [[LEON3]]) | * [[LEON4]] [[SPARC]] core (from [[LEON3]]) | ||
* Added support for [[OpenCL]] | * Added support for [[OpenCL]] | ||
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== Die == | == Die == |
codename | SHAVE v3.0 + |
designer | Movidius + |
first launched | 2014 + |
full page name | movidius/microarchitectures/shave v3.0 + |
instance of | microarchitecture + |
instruction set architecture | SHAVE + and SPARC v8 + |
manufacturer | TSMC + |
name | SHAVE v3.0 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |