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Latest revision | Your text | ||
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** Instruction predication | ** Instruction predication | ||
** Large set of integer operations | ** Large set of integer operations | ||
+ | ** C-compiler support | ||
* VLIW style | * VLIW style | ||
** Parallel functional units controlled by VLIW instructions | ** Parallel functional units controlled by VLIW instructions |
Facts about "SHAVE v2.0 - Microarchitectures - Intel Movidius"
codename | SHAVE v2.0 + |
designer | Movidius + |
first launched | 2011 + |
full page name | movidius/microarchitectures/shave v2.0 + |
instance of | microarchitecture + |
instruction set architecture | SHAVE + and SPARC v8 + |
manufacturer | TSMC + |
name | SHAVE v2.0 + |
phase-out | 2014 + |
process | 65 nm (0.065 μm, 6.5e-5 mm) + |