From WikiChip
Editing mathstar/builder
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 11: | Line 11: | ||
| first launched = 2003 | | first launched = 2003 | ||
| production start = 2003 | | production start = 2003 | ||
− | | production end = | + | | production end = 2005 |
| microarch = | | microarch = | ||
| word = 16 bit | | word = 16 bit | ||
Line 27: | Line 27: | ||
| successor link = mathstar/arrix | | successor link = mathstar/arrix | ||
}} | }} | ||
− | '''Builder''' was a family of [[FPOA]]s introduced by [[MathStar]] in 2003. This family the earliest attempt at designing an FPOA and was discontinued shortly after due to some technical issues. The Builder family was phased out entirely by | + | '''Builder''' was a family of [[FPOA]]s introduced by [[MathStar]] in 2003. This family the earliest attempt at designing an FPOA and was discontinued shortly after due to some technical issues. The Builder family was phased out entirely by 2005. |
== Architecture == | == Architecture == | ||
Line 33: | Line 33: | ||
The Builder family was the MathStar's initial attempt at a [[field-programmable object array]]. Each chip contains 100s of silicon objects laid out in a grid, broken down to arrays of five objects each. Instructions are loaded to each of the objects at power-up. | The Builder family was the MathStar's initial attempt at a [[field-programmable object array]]. Each chip contains 100s of silicon objects laid out in a grid, broken down to arrays of five objects each. Instructions are loaded to each of the objects at power-up. | ||
+ | [[File:mathstar layout.png|left]] | ||
Inter-Object communication was done primarily by passing data to the nearest neighbor through a unidirectional synchronous interconnect. Communication is configured dynamically and on-demand. Each object had the facilities needed for clock synchronization, [[built-in self-test]], etc... | Inter-Object communication was done primarily by passing data to the nearest neighbor through a unidirectional synchronous interconnect. Communication is configured dynamically and on-demand. Each object had the facilities needed for clock synchronization, [[built-in self-test]], etc... | ||
=== Object === | === Object === | ||
− | |||
There are five different types of components: [[Arithmetic Logic Unit]] (ALU), [[Content Addressable Memory]] (CAM), [[Cyclic Redundancy Check]] (CRC), [[Multiply Accumulator]] (MAC), and [[Register File]] (RF). The control program guides the overall program execution and the datapath setup. Datapath is {{arch|16}} but may be combined with adjacent objects to [[bit-slice microprocessor|form larger datapaths]] of desired size. | There are five different types of components: [[Arithmetic Logic Unit]] (ALU), [[Content Addressable Memory]] (CAM), [[Cyclic Redundancy Check]] (CRC), [[Multiply Accumulator]] (MAC), and [[Register File]] (RF). The control program guides the overall program execution and the datapath setup. Datapath is {{arch|16}} but may be combined with adjacent objects to [[bit-slice microprocessor|form larger datapaths]] of desired size. | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
{{clear}} | {{clear}} | ||
− | |||
== Members == | == Members == | ||
The amount and types of the individual objects were chosen based on the applications the were meant to run on the chip. MathStar divided the product line into BridgeBuilder, FilterBuilder, StorageBuilder, SecurityBuilder and SwitchBuilder. | The amount and types of the individual objects were chosen based on the applications the were meant to run on the chip. MathStar divided the product line into BridgeBuilder, FilterBuilder, StorageBuilder, SecurityBuilder and SwitchBuilder. | ||
Line 69: | Line 45: | ||
=== BridgeBuilder === | === BridgeBuilder === | ||
The BridgeBuilder series was designed for high-speed networking applications handling 10Gbps or more as well as bus bridging applications. | The BridgeBuilder series was designed for high-speed networking applications handling 10Gbps or more as well as bus bridging applications. | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
=== FilterBuilder === | === FilterBuilder === | ||
− | + | {{empty section}} | |
− | |||
− | { | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
=== StorageBuilder === | === StorageBuilder === | ||
− | + | {{empty section}} | |
=== SecurityBuilder === | === SecurityBuilder === | ||
− | + | {{empty section}} | |
=== SwitchBuilder === | === SwitchBuilder === | ||
− | + | {{empty section}} | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− |
Facts about "Builder - MathStar"
designer | MathStar + |
first announced | 2002 + |
first launched | 2003 + |
full page name | mathstar/builder + |
instance of | integrated circuit family + |
main designer | MathStar + |
manufacturer | TSMC + |
name | Builder + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
technology | CMOS + |
word size | 16 bit (2 octets, 4 nibbles) + |