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− | '''ARMADA 618''' was a {{arch|32}} [[ARM]] microprocessor introduced by [[Marvell]] in 2009. This processor, which is based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 618 also | + | '''ARMADA 618''' was a {{arch|32}} [[ARM]] microprocessor introduced by [[Marvell]] in 2009. This processor, which is based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 618 also incorporated a fairly powerful GPU. |
== Cache == | == Cache == | ||
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== Graphics == | == Graphics == | ||
− | + | This chip has a custom integrated [[GPU]] capable of 45 million triangle strips per second, 250 Mpixel/s fill rate and offer full support for OpenGL ES 2.0 and 1.1 and Open VG 1.1. | |
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+ | * Integrated video accelerator supporting 30 fps 1080p decode and encode | ||
* 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2. | * 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2. | ||
− | * 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2 | + | * 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2 |
== Hardware Accelerators == | == Hardware Accelerators == |
Facts about "ARMADA 618 - Marvell"
base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
core count | 1 + |
core name | Sheeva PJ4 + |
designer | Marvell + |
family | ARMADA 600 + |
first announced | February 16, 2010 + |
first launched | February 16, 2010 + |
full page name | marvell/armada/618 + |
has ecc memory support | false + |
instance of | microprocessor + |
integrated gpu | GC860 + |
integrated gpu designer | Vivante + |
io voltage | 1.5 V (15 dV, 150 cV, 1,500 mV) +, 3 V (30 dV, 300 cV, 3,000 mV) + and 3.3 V (33 dV, 330 cV, 3,300 mV) + |
io voltage tolerance | 0.3 V + |
isa | ARMv6 + and ARMv5 + |
isa family | ARM + |
l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
ldate | February 16, 2010 + |
manufacturer | TSMC + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) + |
max memory bandwidth | 7.942 GiB/s (8,132.608 MiB/s, 8.528 GB/s, 8,527.658 MB/s, 0.00776 TiB/s, 0.00853 TB/s) + |
max memory channels | 1 + |
microarchitecture | Sheeva PJ4 + |
model number | 618 + |
name | ARMADA 618 + |
part number | 88AP618 + |
platform | ARMADA + |
process | 55 nm (0.055 μm, 5.5e-5 mm) + |
series | 600 + |
smp max ways | 1 + |
supported memory type | DDR3-1066 + and DDR2-800 + |
thread count | 1 + |
word size | 32 bit (4 octets, 8 nibbles) + |