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* '''Proc:''' [[14 nm process]]
 
* '''Proc:''' [[14 nm process]]
* '''TDP:''' 70 W, 85 W
+
* '''TDP:''' 85 W, 70 W
 
* '''Mem:''' 768 GiB hexa-channel DDR4-2400 ECC memory.
 
* '''Mem:''' 768 GiB hexa-channel DDR4-2400 ECC memory.
* '''I/O:''' 48 PCIe Gen 3.0 lanes
+
* '''I/O:''' 48 PCIe 3 lanes
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}})
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}})
 
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
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{{comp table start}}
 
{{comp table start}}
 
<table class="comptable sortable tc4 tc5">
 
<table class="comptable sortable tc4 tc5">
{{comp table header|main|9:List of Skylake-based Xeon Silver Processors}}
+
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Skylake-based Xeon Silver Processors</th></tr>
{{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, Max Turbo, TDP, L2$, L3$}}
+
<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th></tr>
 +
{{comp table header 1|cols=Price, Launched, Cores, Threads, %Frequency, %Max Turbo, %TDP, %L2$, %L3$, Mem Type, %Max Mem}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake (server)]]
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake (server)]]
 
  |?full page name
 
  |?full page name
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  |?l2$ size
 
  |?l2$ size
 
  |?l3$ size
 
  |?l3$ size
 +
|?supported memory type
 +
|?max memory#GiB
 
  |format=template
 
  |format=template
 
  |template=proc table 3
 
  |template=proc table 3
  |userparam=11
+
  |userparam=13
 
  |mainlabel=-
 
  |mainlabel=-
 
}}
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake (server)]]}}
 
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake (server)]]}}
</table>
 
{{comp table end}}
 
 
=== 4200-Series (Cascade Lake) ===
 
{{see also|intel/microarchitectures/cascade lake|intel/cores/cascade lake sp|intel/cores/cascade lake r|l1=Cascade Lake µarch|l2=Cascade Lake SP corename|l3=Cascade Lake R corename}}
 
Second-generation Xeon Scalable Silver was introduced in early 2019. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture which allows for higher clock speeds and introduced a {{intel|Cascade Lake#Key changes from Skylake|l=arch|number of}} hardware changes against the various [[speculative execution]] [[side channel analysis|vulnerabilities]]. Those processors also introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 4200-series Xeon Silver processors support:
 
 
* '''Proc:''' [[14 nm process]]
 
* '''TDP:''' 70 W, 85 W, 100 W
 
* '''Mem:''' 1 TiB hexa-channel DDR4-2400 ECC memory
 
* '''I/O:''' 48 PCIe Gen 3.0 lanes
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}}/{{x86|AVX512VNNI|VNNI}})
 
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 
 
All Xeon Silver processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 {{intel|Ultra Path Interconnect}} (UPI) links.
 
 
<!-- NOTE:
 
          This table is generated automatically from the data in the actual articles.
 
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
          created and tagged accordingly.
 
 
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
-->
 
{{comp table start}}
 
<table class="comptable sortable tc4 tc5">
 
{{comp table header|main|9:List of Cascade Lake-based Xeon Silver Processors}}
 
{{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, Max Turbo, TDP, L2$, L3$}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Cascade Lake]]
 
|?full page name
 
|?model number
 
|?release price
 
|?first launched
 
|?core count
 
|?thread count
 
|?base frequency#GHz
 
|?turbo frequency (1 core)#GHz
 
|?tdp
 
|?l2$ size
 
|?l3$ size
 
|format=template
 
|template=proc table 3
 
|valuesep=,
 
|userparam=11
 
|mainlabel=-
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Cascade Lake]]}}
 
 
</table>
 
</table>
 
{{comp table end}}
 
{{comp table end}}

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Facts about "Xeon Silver - Intel"
designerIntel +
first announcedMay 4, 2017 +
first launchedJuly 11, 2017 +
full page nameintel/xeon silver +
instance ofmicroprocessor family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureSkylake +
nameXeon Silver +
packageFCLGA-3647 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketLGA-3647 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +