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{{intel title|Xeon Gold 5117}}
 
{{intel title|Xeon Gold 5117}}
−
{{chip
+
{{mpu
−
|name=Xeon Gold 5117
+
| future              = Yes
−
|image=skylake sp (basic).png
+
| name               = Xeon Gold 5117
−
|designer=Intel
+
| no image            = Yes
−
|manufacturer=Intel
+
| image              =
−
|model number=5117
+
| image size          =
−
|s-spec=SR37S
+
| caption            =  
−
|s-spec qs=QM8S
+
| designer           = Intel
−
|market=Server
+
| manufacturer       = Intel
−
|first announced=July 11, 2017
+
| model number       = 5117
−
|first launched=July 11, 2017
+
| part number        =
−
|family=Xeon Gold
+
| part number 1      =
−
|series=5100
+
| part number 2      =
−
|locked=Yes
+
| s-spec             =  
−
|frequency=2,000 MHz
+
| s-spec 2            =  
−
|turbo frequency1=2,800 MHz
+
| market             = Server
−
|clock multiplier=20
+
| first announced     = April 25, 2017
−
|cpuid=0x50654
+
| first launched     =  
−
|isa=x86-64
+
| last order          =
−
|isa family=x86
+
| last shipment      =
−
|microarch=Skylake (server)
+
| release price      =
−
|platform=Purley
+
 
−
|chipset=Lewisburg
+
| family             = Xeon Gold
−
|core name=Skylake SP
+
| series             = 5000
−
|core family=6
+
| locked             = Yes
−
|process=14 nm
+
| frequency           = 2.0 GHz
−
|technology=CMOS
+
| turbo frequency    =
−
|word size=64 bit
+
| turbo frequency1   =
−
|core count=14
+
| turbo frequency2    =  
−
|thread count=28
+
| turbo frequency3    =
−
|max cpus=4
+
| turbo frequency4    =
−
|max memory=768 GiB
+
| turbo frequency5    =
−
|tdp=105 W
+
| turbo frequency6    =
−
|tcase min=0 °C
+
| turbo frequency7    =
−
|tcase max=81 °C
+
| turbo frequency8    =
−
|package name 1=intel,fclga_3647
+
| bus type            = DMI 3.0
−
|successor=Xeon Gold 5217
+
| bus speed          =
−
|successor link=intel/xeon_gold/5217
+
| bus rate            = 8 GT/s
 +
| bus links          = 4
 +
| clock multiplier   = 20
 +
| cpuid               =  
 +
| cpuid 2            =
 +
 
 +
| isa family          = x86-64
 +
| isa                 = x86
 +
| microarch           = Skylake
 +
| platform           = Purley
 +
| chipset             = Lewisburg
 +
| core name           = Skylake SP
 +
| core family         =  
 +
| core model          =
 +
| core stepping      = H0
 +
| process             = 14 nm
 +
| transistors        =
 +
| technology         = CMOS
 +
| die area            = <!-- XX mm² -->
 +
| die width          =
 +
| die length          =
 +
| word size           = 64 bit
 +
| core count         = 28
 +
| thread count       = 56
 +
| max cpus           = 2
 +
| max memory         =
 +
 
 +
| electrical          =
 +
| power              =
 +
| average power      =
 +
| idle power          =
 +
| v core              =
 +
| v core tolerance    = <!-- OR ... -->
 +
| v core min          =
 +
| v core max          =
 +
| v io                =
 +
| v io tolerance      =
 +
| v io 2              = <!-- OR ... -->
 +
| v io 3              =
 +
| sdp                =  
 +
| tdp                 =
 +
| tdp typical        =
 +
| ctdp down          =
 +
| ctdp down frequency =
 +
| ctdp up            =
 +
| ctdp up frequency  =
 +
| temp min            = <!-- use TJ/TC whenever possible instead -->
 +
| temp max            =
 +
| tjunc min          = <!-- .. °C -->
 +
| tjunc max          =  
 +
| tcase min           =  
 +
| tcase max           =
 +
| tstorage min        =
 +
| tstorage max        =
 +
| tambient min        =
 +
| tambient max        =  
 +
 
 +
| package module 1   =
 +
| package module 2    =  
 +
<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
 +
| packaging          = Yes
 +
| package 0          = FCLGA-3647
 +
| package 0 type      = LGA
 +
| package 0 pins      = 3647
 +
| package 0 pitch    =
 +
| package 0 width    =
 +
| package 0 length    =
 +
| package 0 height    =
 +
| socket 0            = LGA-3647
 +
| socket 0 type      = LGA
 
}}
 
}}
−
'''Xeon Gold 5117''' is a {{arch|64}} [[tetradeca-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 5117, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 1 {{x86|AVX-512}} [[FMA]] unit as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2 GHz with a TDP of 105 W and a {{intel|turbo boost}} frequency of up to 2.8 GHz, supports up 768 GiB of hexa-channel DDR4-2400 ECC memory.
+
'''Xeon Gold 5117''' is a {{arch|64}} [[x86]] high-performance server [[octacosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 5117 operates at 2 GHz.
 +
 
 +
 
 +
{{unknown features}}
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
+
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{cache size
 
{{cache size
−
|l1 cache=896 KiB
+
|l1 cache=1.75 MiB
−
|l1i cache=448 KiB
+
|l1i cache=896 KiB
−
|l1i break=14x32 KiB
+
|l1i break=28x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1d cache=448 KiB
+
|l1d cache=896 KiB
−
|l1d break=14x32 KiB
+
|l1d break=28x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d policy=write-back
 
|l1d policy=write-back
−
|l2 cache=14 MiB
+
|l2 cache=28 MiB
−
|l2 break=14x1 MiB
+
|l2 break=28x1 MiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
 
|l2 policy=write-back
 
|l2 policy=write-back
−
|l3 cache=19.25 MiB
+
|l3 cache=38.5 MiB
−
|l3 break=14x1.375 MiB
+
|l3 break=28x1.375 MiB
 
|l3 desc=11-way set associative
 
|l3 desc=11-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
Line 64: Line 136:
 
== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
−
|type=DDR4-2400
+
|type=DDR4-2666
 
|ecc=Yes
 
|ecc=Yes
−
|max mem=768 GiB
+
|max mem=
−
|controllers=2
+
|controllers=1
 
|channels=6
 
|channels=6
−
|max bandwidth=107.3 GiB/s
+
|max bandwidth=119.21 GiB/s
−
|bandwidth schan=17.88 GiB/s
+
|bandwidth schan=19.89 GiB/s
−
|bandwidth dchan=35.76 GiB/s
+
|bandwidth dchan=39.72 GiB/s
−
|bandwidth qchan=71.53 GiB/s
+
|bandwidth qchan=79.47 GiB/s
−
|bandwidth hchan=107.3 GiB/s
+
|bandwidth hchan=119.21 GiB/s
 
}}
 
}}
−
 
−
== Expansions ==
 
−
{{expansions
 
−
| pcie revision      = 3.0
 
−
| pcie lanes        = 48
 
−
| pcie config        = x16
 
−
| pcie config 2      = x8
 
−
| pcie config 3      = x4
 
−
}}
 
−
 
−
== Features ==
 
−
{{x86 features
 
−
|real=Yes
 
−
|protected=Yes
 
−
|smm=Yes
 
−
|fpu=Yes
 
−
|x8616=Yes
 
−
|x8632=Yes
 
−
|x8664=Yes
 
−
|nx=Yes
 
−
|mmx=Yes
 
−
|emmx=Yes
 
−
|sse=Yes
 
−
|sse2=Yes
 
−
|sse3=Yes
 
−
|ssse3=Yes
 
−
|sse41=Yes
 
−
|sse42=Yes
 
−
|sse4a=No
 
−
|avx=Yes
 
−
|avx2=Yes
 
−
|avx512f=Yes
 
−
|avx512cd=Yes
 
−
|avx512er=No
 
−
|avx512pf=No
 
−
|avx512bw=Yes
 
−
|avx512dq=Yes
 
−
|avx512vl=Yes
 
−
|avx512ifma=No
 
−
|avx512vbmi=No
 
−
|avx5124fmaps=No
 
−
|avx5124vnniw=No
 
−
|avx512vpopcntdq=No
 
−
|abm=Yes
 
−
|tbm=No
 
−
|bmi1=Yes
 
−
|bmi2=Yes
 
−
|fma3=Yes
 
−
|fma4=No
 
−
|aes=Yes
 
−
|rdrand=Yes
 
−
|sha=No
 
−
|xop=No
 
−
|adx=Yes
 
−
|clmul=Yes
 
−
|f16c=Yes
 
−
|tbt1=No
 
−
|tbt2=Yes
 
−
|tbmt3=No
 
−
|bpt=No
 
−
|eist=Yes
 
−
|sst=Yes
 
−
|flex=No
 
−
|fastmem=No
 
−
|ivmd=Yes
 
−
|intelnode=Yes
 
−
|kpt=Yes
 
−
|ptt=Yes
 
−
|mbe=Yes
 
−
|isrt=No
 
−
|sba=No
 
−
|mwt=No
 
−
|sipp=No
 
−
|att=No
 
−
|ipt=No
 
−
|tsx=Yes
 
−
|txt=Yes
 
−
|ht=Yes
 
−
|vpro=Yes
 
−
|vtx=Yes
 
−
|vtd=No
 
−
|ept=Yes
 
−
|mpx=No
 
−
|sgx=No
 
−
|securekey=No
 
−
|osguard=No
 
−
|3dnow=No
 
−
|e3dnow=No
 
−
|smartmp=No
 
−
|powernow=No
 
−
|amdvi=No
 
−
|amdv=No
 
−
|amdsme=No
 
−
|amdtsme=No
 
−
|amdsev=No
 
−
|rvi=No
 
−
|smt=No
 
−
|sensemi=No
 
−
|xfr=No
 
−
}}
 
−
 
−
== Frequencies ==
 
−
{{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
 
−
{{frequency table
 
−
|freq_base=2,000 MHz
 
−
|freq_1=2,800 MHz
 
−
|freq_2=2,800 MHz
 
−
|freq_3=2,600 MHz
 
−
|freq_4=2,600 MHz
 
−
|freq_5=2,500 MHz
 
−
|freq_6=2,500 MHz
 
−
|freq_7=2,500 MHz
 
−
|freq_8=2,500 MHz
 
−
|freq_9=2,400 MHz
 
−
|freq_10=2,400 MHz
 
−
|freq_11=2,400 MHz
 
−
|freq_12=2,400 MHz
 
−
|freq_13=2,300 MHz
 
−
|freq_14=2,300 MHz
 
−
|freq_avx2_base=1,300 MHz
 
−
|freq_avx2_1=2,800 MHz
 
−
|freq_avx2_2=2,800 MHz
 
−
|freq_avx2_3=2,500 MHz
 
−
|freq_avx2_4=2,500 MHz
 
−
|freq_avx2_5=1,900 MHz
 
−
|freq_avx2_6=1,900 MHz
 
−
|freq_avx2_7=1,900 MHz
 
−
|freq_avx2_8=1,900 MHz
 
−
|freq_avx2_9=1,600 MHz
 
−
|freq_avx2_10=1,600 MHz
 
−
|freq_avx2_11=1,600 MHz
 
−
|freq_avx2_12=1,600 MHz
 
−
|freq_avx2_13=1,600 MHz
 
−
|freq_avx2_14=1,600 MHz
 
−
|freq_avx512_base=1,100 MHz
 
−
|freq_avx512_1=2,800 MHz
 
−
|freq_avx512_2=2,800 MHz
 
−
|freq_avx512_3=2,200 MHz
 
−
|freq_avx512_4=2,200 MHz
 
−
|freq_avx512_5=1,700 MHz
 
−
|freq_avx512_6=1,700 MHz
 
−
|freq_avx512_7=1,700 MHz
 
−
|freq_avx512_8=1,700 MHz
 
−
|freq_avx512_9=1,400 MHz
 
−
|freq_avx512_10=1,400 MHz
 
−
|freq_avx512_11=1,400 MHz
 
−
|freq_avx512_12=1,400 MHz
 
−
|freq_avx512_13=1,400 MHz
 
−
|freq_avx512_14=1,400 MHz
 
−
}}
 
−
 
−
[[Category:microprocessor models by intel based on skylake extreme core count die]]
 

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Retrieved from "https://en.wikichip.org/wiki/intel/xeon_gold/5117"
Facts about "Xeon Gold 5117 - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon Gold 5117 - Intel#io +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
chipsetLewisburg +
clock multiplier20 +
core count14 +
core family6 +
core nameSkylake SP +
cpuid0x50654 +
designerIntel +
familyXeon Gold +
first announcedJuly 11, 2017 +
first launchedJuly 11, 2017 +
full page nameintel/xeon gold/5117 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel vPro Technology +, Intel VT-x +, Transactional Synchronization Extensions +, Turbo Boost Technology 2.0 +, Speed Shift Technology +, Trusted Execution Technology +, Extended Page Tables + and Advanced Vector Extensions 512 +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size896 KiB (917,504 B, 0.875 MiB) +
l1d$ description8-way set associative +
l1d$ size448 KiB (458,752 B, 0.438 MiB) +
l1i$ description8-way set associative +
l1i$ size448 KiB (458,752 B, 0.438 MiB) +
l2$ description16-way set associative +
l2$ size14 MiB (14,336 KiB, 14,680,064 B, 0.0137 GiB) +
l3$ description11-way set associative +
l3$ size19.25 MiB (19,712 KiB, 20,185,088 B, 0.0188 GiB) +
ldateJuly 11, 2017 +
main imageFile:skylake sp (basic).png +
manufacturerIntel +
market segmentServer +
max case temperature354.15 K (81 °C, 177.8 °F, 637.47 °R) +
max cpu count4 +
max memory786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) +
max memory bandwidth107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) +
max memory channels6 +
max pcie lanes48 +
microarchitectureSkylake (server) +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number5117 +
nameXeon Gold 5117 +
packageFCLGA-3647 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
s-specSR37S +
s-spec (qs)QM8S +
series5100 +
smp max ways4 +
socketSocket P + and LGA-3647 +
supported memory typeDDR4-2400 +
tdp105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technologyCMOS +
thread count28 +
turbo frequency (1 core)2,800 MHz (2.8 GHz, 2,800,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +