From WikiChip
Editing intel/xeon gold
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 8: | Line 8: | ||
| type = Microprocessors | | type = Microprocessors | ||
| first announced = May 4, 2017 | | first announced = May 4, 2017 | ||
− | | first launched = | + | | first launched = H2, 2017 |
| arch = x86 server multiprocessors | | arch = x86 server multiprocessors | ||
| isa = x86-64 | | isa = x86-64 | ||
Line 15: | Line 15: | ||
| proc = 14 nm | | proc = 14 nm | ||
| tech = CMOS | | tech = CMOS | ||
− | | clock min = | + | | clock min = |
− | | clock max = | + | | clock max = |
| package = FCLGA-3647 | | package = FCLGA-3647 | ||
| socket = LGA-3647 | | socket = LGA-3647 | ||
Line 29: | Line 29: | ||
}} | }} | ||
'''Xeon Gold''' is a family of {{arch|64}} [[x86]] dual/quad-socket multi-core high performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Gold offers highest performance and high scalability with up to 4-way multiprocessing. | '''Xeon Gold''' is a family of {{arch|64}} [[x86]] dual/quad-socket multi-core high performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Gold offers highest performance and high scalability with up to 4-way multiprocessing. | ||
− | |||
− | |||
− | |||
== Members == | == Members == | ||
− | === | + | === Skylake === |
− | {{see also|intel/microarchitectures/skylake | + | {{see also|intel/microarchitectures/skylake|l1=Skylake µarch}} |
− | + | Introduced in July 2017, the {{intel|Skylake|l=arch}}-based Xeon Gold microprocessors support four-way [[multiprocessing]] with up to [[22 cores]] and 44 threads. Additionally, all Xeon Gold processors support: | |
− | |||
* '''TDP:''' 85 W - 200 W | * '''TDP:''' 85 W - 200 W | ||
− | * '''Mem:''' 768 GiB hexa-channel DDR4- | + | * '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory. |
** ''M'' versions support 1.5 TiB per socket | ** ''M'' versions support 1.5 TiB per socket | ||
− | * '''I/O:''' 48 PCIe | + | * '''I/O:''' 48 PCIe 3 lanes |
− | * '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, | + | * '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL) |
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT). | * '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT). | ||
− | All Xeon Gold processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 {{intel|Ultra Path Interconnect}} (UPI) links | + | All Xeon Gold processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 {{intel|Ultra Path Interconnect}} (UPI) links. |
<!-- NOTE: | <!-- NOTE: | ||
Line 56: | Line 52: | ||
--> | --> | ||
{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc5 tc6"> |
− | + | <tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Gold Processors</th></tr> | |
− | + | <tr class="comptable-header"><th> </th><th colspan="6">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th></tr> | |
− | + | {{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, %TDP, L2$, L3$, Mem Type, Max Mem}} | |
− | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake]] | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | </ | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | < | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | < | ||
− | |||
− | |||
− | {{comp table header 1|cols=Price, Launched, Cores, Threads, | ||
− | |||
− | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture:: | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
Line 161: | Line 64: | ||
|?thread count | |?thread count | ||
|?base frequency#GHz | |?base frequency#GHz | ||
− | |||
|?tdp | |?tdp | ||
|?l2$ size | |?l2$ size | ||
Line 169: | Line 71: | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | + | |userparam=12 | |
− | |userparam= | ||
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture:: | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} |
Facts about "Xeon Gold - Intel"
designer | Intel + |
first announced | May 4, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon gold + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + |
name | Xeon Gold + |
package | FCLGA-3647 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |