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Difference between revisions of "intel/xeon e5/e5-2695 v4"
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The '''Xeon E5-2695 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (1U Square form factors). Operating at 2.1 GHz with a {{intel|turbo boost}} frequency of 3.3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 
The '''Xeon E5-2695 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (1U Square form factors). Operating at 2.1 GHz with a {{intel|turbo boost}} frequency of 3.3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
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== Cache ==
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{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
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{{cache info
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|l1i cache=576 KiB
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|l1i break=18x32 KiB
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|l1i desc=8-way set associative
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|l1i extra=(per core, write-back)
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|l1d cache=576 KiB
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|l1d break=18x32 KiB
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|l1d desc=8-way set associative
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|l1d extra=(per core, write-back)
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|l2 cache=4.5 MiB
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|l2 break=18x256 KiB
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|l2 desc=8-way set associative
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|l2 extra=(per core, write-back)
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|l3 cache=45 MiB
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|l3 break=18x2.5 MiB
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|l3 desc=20-way set associative
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|l3 extra=(shared, per core, write-back)
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}}

Revision as of 04:07, 3 November 2016

Template:mpu The Xeon E5-2695 v4 is a 64-bit octadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (1U Square form factors). Operating at 2.1 GHz with a turbo boost frequency of 3.3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 576 KiB
589,824 B
0.563 MiB
18x32 KiB 8-way set associative (per core, write-back)
L1D$ 576 KiB
589,824 B
0.563 MiB
18x32 KiB 8-way set associative (per core, write-back)
L2$ 4.5 MiB
4,608 KiB
4,718,592 B
0.00439 GiB
18x256 KiB 8-way set associative (per core, write-back)
L3$ 45 MiB
46,080 KiB
47,185,920 B
0.0439 GiB
18x2.5 MiB 20-way set associative (shared, per core, write-back)
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Facts about "Xeon E5-2695 v4 - Intel"
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l1d$ description8-way set associative +
l1d$ size576 KiB (589,824 B, 0.563 MiB) +
l1i$ description8-way set associative +
l1i$ size576 KiB (589,824 B, 0.563 MiB) +
l2$ description8-way set associative +
l2$ size4.5 MiB (4,608 KiB, 4,718,592 B, 0.00439 GiB) +
l3$ description20-way set associative +
l3$ size45 MiB (46,080 KiB, 47,185,920 B, 0.0439 GiB) +