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'''Xeon Bronze''' is a family of {{arch|64}} [[x86]] dual-socket multi-core entry-level server-class microprocessors introduced by [[Intel]] in 2017.
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'''Xeon Bronze''' is a family of {{arch|64}} [[x86]] dual-socket multi-core entry-level server microprocessors introduced by [[Intel]] in 2017.
  
 
== Overview ==
 
== Overview ==
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=== 3100-Series (Skylake) ===
 
=== 3100-Series (Skylake) ===
 
{{see also|intel/microarchitectures/skylake (server)|l1=Skylake µarch}}
 
{{see also|intel/microarchitectures/skylake (server)|l1=Skylake µarch}}
First-generation Xeon Bronze processors were introduced in July 2017. Those chips were fabricated on a enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture which brought a {{intel|Skylake (Server)#Key changes from Broadwell|l=arch|relatively large}} SoC design change from the prior Xeon families. Those processors were the first to move to a {{intel|mesh interconnect}} which introduced a tile-based architecture, bringing the first implementation of {{x86|AVX-512}} along with a rearchitected cache hierarchy designed for server workloads. All of the bronze 3100-series microprocessors feature dual-socket capabilities with up to [[8 cores]] and 8 threads. Additionally, all Xeon Bronze processors support:
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Second-generation Xeon
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Introduced in July 2017, the {{intel|Skylake (server)|Skylake|l=arch}}-based Xeon Bronze microprocessors are all dual-socket multiprocessors with up to [[8 cores]] and 8 threads. Additionally, all Xeon Bronze processors support:
  
* '''Proc:''' [[14 nm process]]
 
 
* '''TDP:''' 85 W
 
* '''TDP:''' 85 W
 
* '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory.
 
* '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory.
* '''I/O:''' 48 PCIe Gen 3.0 lanes
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* '''I/O:''' 48 PCIe 3 lanes
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}})
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}})
 
* '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 
* '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
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=== 3200-Series (Cascade Lake) ===
 
=== 3200-Series (Cascade Lake) ===
{{see also|intel/microarchitectures/cascade lake|l1=Cascade Lake µarch}}
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{{see also|intel/microarchitectures/skylake (server)|l1=Skylake µarch}}
Second-generation Xeon Scalable Bronze was introduced in early 2019. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture which allows for higher clock speeds and introduced a {{intel|Cascade Lake#Key changes from Skylake|l=arch|number of}} hardware changes against the various [[speculative execution]] [[side channel analysis|vulnerabilities]]. Those processors also introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 3200-series Xeon Bronze processors support:
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Second-generation Xeon Scalable Bronze was introduced in early 2018. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture. Those processors introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 3200-series Xeon Bronze processors support:
  
 
* '''TDP:''' 85 W
 
* '''TDP:''' 85 W

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Facts about "Xeon Bronze - Intel"
designerIntel +
first announcedMay 4, 2017 +
first launchedJuly 11, 2017 +
full page nameintel/xeon bronze +
instance ofmicroprocessor family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureSkylake +
nameXeon Bronze +
packageFCLGA-3647 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketLGA-3647 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +