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===== Retirement ===== | ===== Retirement ===== | ||
− | Once a µOP executes, or in the case of fused µOPs both µOPs have executed, they can be [[retired]]. Retirement happens [[in-order]] and releases any used resources such as those used to keep track in the [[reorder buffer]]. With retirement/allocation increasing from four to five in Sunny Cove, it's now possible to retire 5 instructions per cycle (5 unfused or 7 with fused ops). | + | Once a µOP executes, or in the case of fused µOPs both µOPs have executed, they can be [[retired]]. {{\\|Haswell}} is able to commit up to four fused µOPs each cycle per thread. Retirement happens [[in-order]] and releases any used resources such as those used to keep track in the [[reorder buffer]]. With retirement/allocation increasing from four to five in Sunny Cove, it's now possible to retire 5 instructions per cycle (5 unfused or 7 with fused ops). |
== Die == | == Die == |
Facts about "Sunny Cove - Microarchitectures - Intel"
codename | Sunny Cove + |
core count | 2 +, 4 +, 8 +, 10 +, 12 +, 16 +, 18 +, 20 +, 24 +, 26 +, 28 +, 32 +, 36 +, 38 + and 40 + |
designer | Intel + |
first launched | 2019 + |
full page name | intel/microarchitectures/sunny cove + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sunny Cove + |
phase-out | 2021 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |