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|successor link=intel/microarchitectures/willow cove | |successor link=intel/microarchitectures/willow cove | ||
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− | '''Sunny Cove''' ('''SNC'''), the successor to {{\\|Palm Cove}}, is a high-performance [[10 nm]] [[x86]] | + | '''Sunny Cove''' ('''SNC'''), the successor to {{\\|Palm Cove}}, is a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products, including {{\\|Ice Lake (Client)}}, {{\\|Ice Lake (Server)}}, {{\\|Lakefield}}, and the Nervana {{nervana|NNP-I}}. The microarchitecture was developed by Intel's R&D Center (IDC) in Haifa, Israel. |
== History == | == History == |
Facts about "Sunny Cove - Microarchitectures - Intel"
codename | Sunny Cove + |
core count | 2 +, 4 +, 8 +, 10 +, 12 +, 16 +, 18 +, 20 +, 24 +, 26 +, 28 +, 32 +, 36 +, 38 + and 40 + |
designer | Intel + |
first launched | 2019 + |
full page name | intel/microarchitectures/sunny cove + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sunny Cove + |
phase-out | 2021 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |