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Difference between revisions of "intel/microarchitectures/spring hill"
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{{intel title|Spring Hill|l=arch}} | {{intel title|Spring Hill|l=arch}} | ||
{{microarchitecture}} | {{microarchitecture}} | ||
| − | '''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. | + | '''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. Spring Hill was developed by the Israel Haifa Development Center (IDC). |
| − | Spring Hill- | + | Spring Hill-based products are branded as the {{nervana|NNP-I}} 1000 series. |
| + | |||
| + | == Process technology == | ||
| + | Spring Hill NPUs are fabricated on Intel's [[10 nm process]]. | ||
| + | |||
| + | == Architecture == | ||
| + | {{empty section}} | ||
| + | |||
| + | === Block Diagram === | ||
| + | ==== SoC Overview ==== | ||
| + | {{empty section}} | ||
| + | |||
| + | ==== Sunny Cove Core ==== | ||
| + | See {{intel|sunny cove#Block diagram|Sunny Cove § Block diagram|l=arch}}. | ||
| + | |||
| + | ==== Inference Engine (ICE) ==== | ||
| + | {{empty section}} | ||
| + | |||
| + | === Memory Organization === | ||
| + | {{empty section}} | ||
| + | |||
| + | == Overview == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Inference Engine (ICE) == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Board == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Die == | ||
| + | * [[10 nm process]] | ||
| + | * 8,500,000,000 transistors | ||
| + | * 239 mm² die size | ||
Revision as of 16:29, 15 October 2019
| Edit Values |
Spring Hill is a 10 nm microarchitecture designed by Intel for their inference neural processors. Spring Hill was developed by the Israel Haifa Development Center (IDC).
Spring Hill-based products are branded as the NNP-I 1000 series.
Contents
Process technology
Spring Hill NPUs are fabricated on Intel's 10 nm process.
Architecture
 |
This section is empty; you can help add the missing info by editing this page. |
Block Diagram
SoC Overview
| |
This section is empty; you can help add the missing info by editing this page. |
Sunny Cove Core
See Sunny Cove § Block diagram.
Inference Engine (ICE)
| |
This section is empty; you can help add the missing info by editing this page. |
Memory Organization
| |
This section is empty; you can help add the missing info by editing this page. |
Overview
| |
This section is empty; you can help add the missing info by editing this page. |
Inference Engine (ICE)
| |
This section is empty; you can help add the missing info by editing this page. |
Board
| |
This section is empty; you can help add the missing info by editing this page. |
Die
- 10 nm process
- 8,500,000,000 transistors
- 239 mm² die size
