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Latest revision | Your text | ||
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|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
− | |||
|introduction=October 5, 2017 | |introduction=October 5, 2017 | ||
|process=14 nm | |process=14 nm | ||
+ | |cores=2 | ||
+ | |cores 2=4 | ||
+ | |cores 3=6 | ||
+ | |cores 4=8 | ||
|type=Superscalar | |type=Superscalar | ||
|type 2=Superpipeline | |type 2=Superpipeline | ||
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|extension 7=SSE4.1 | |extension 7=SSE4.1 | ||
|extension 8=SSE4.2 | |extension 8=SSE4.2 | ||
+ | |extension 9=POPCNT | ||
|extension 10=AVX | |extension 10=AVX | ||
|extension 11=AVX2 | |extension 11=AVX2 | ||
|extension 12=AES | |extension 12=AES | ||
− | |extension 13= | + | |extension 13=PCLMUL |
+ | |extension 14=FSGSBASE | ||
+ | |extension 15=RDRND | ||
|extension 16=FMA3 | |extension 16=FMA3 | ||
+ | |extension 17=F16C | ||
+ | |extension 18=BMI | ||
+ | |extension 19=BMI2 | ||
+ | |extension 20=VT-x | ||
+ | |extension 21=VT-d | ||
+ | |extension 22=TXT | ||
+ | |extension 23=TSX | ||
+ | |extension 24=RDSEED | ||
+ | |extension 25=ADCX | ||
+ | |extension 26=PREFETCHW | ||
+ | |extension 27=CLFLUSHOPT | ||
+ | |extension 28=XSAVE | ||
+ | |extension 29=SGX | ||
+ | |extension 30=MPX | ||
|l1i=32 KiB | |l1i=32 KiB | ||
|l1i per=core | |l1i per=core | ||
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|predecessor=Kaby Lake | |predecessor=Kaby Lake | ||
|predecessor link=intel/microarchitectures/kaby lake | |predecessor link=intel/microarchitectures/kaby lake | ||
− | |successor | + | |successor=Ice Lake |
− | + | |successor link=intel/microarchitectures/ice lake (client) | |
− | |||
− | |successor | ||
|contemporary=Whiskey Lake | |contemporary=Whiskey Lake | ||
|contemporary link=intel/microarchitectures/whiskey_lake | |contemporary link=intel/microarchitectures/whiskey_lake | ||
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{| class="wikitable" | {| class="wikitable" | ||
|- | |- | ||
− | ! Core !! Abbrev | + | ! Core !! Abbrev !! Description !! Graphics !! Target |
|- | |- | ||
− | | {{intel|Coffee Lake U|l=core}} || CFL-U | + | | {{intel|Coffee Lake U|l=core}} || CFL-U || Ultra-low power|| GT3e || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
|- | |- | ||
− | | {{intel|Coffee Lake H|l=core}} || CFL-H | + | | {{intel|Coffee Lake H|l=core}} || CFL-H || High-performance graphics || GT2 || Ultimate mobile performance, mobile workstations |
|- | |- | ||
− | | {{intel|Coffee Lake S|l=core}} || CFL-S | + | | {{intel|Coffee Lake S|l=core}} || CFL-S || Mainstream performance || GT2 || Desktop performance to value, AiOs, and minis |
|- | |- | ||
− | | {{intel|Coffee Lake R|l=core}} || CFL-R | + | | {{intel|Coffee Lake R|l=core}} || CFL-R || Mainstream performance (Refresh) || GT2 || Desktop performance to value, AiOs, and minis |
|- | |- | ||
− | | {{intel|Coffee Lake E|l=core}} || CFL-E | + | | {{intel|Coffee Lake E|l=core}} || CFL-E || Workstation || GT2 || Workstations and entry-level servers |
|} | |} | ||
== Brands == | == Brands == | ||
− | Intel released Coffee Lake under | + | Intel released Coffee Lake under 3 main brand families: |
{| class="wikitable tc4 tc5 tc6 tc7 tc8" style="text-align: center;" | {| class="wikitable tc4 tc5 tc6 tc7 tc8" style="text-align: center;" | ||
|- | |- | ||
− | ! rowspan="2" | Logo !! rowspan="2" | Family | + | ! rowspan="2" | Logo !! rowspan="2" | Family !! rowspan="2" | General Description !! colspan="6" | Differentiating Features |
|- | |- | ||
! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]] | ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]] | ||
|- | |- | ||
− | | [[File: | + | | [[File:core i3 logo (2015).png|50px|link=intel/core_i3]] || {{intel|Core i3}} || Low-end Performance || [[quad-core|Quad]] || {{tchk|no}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|yes}} |
|- | |- | ||
− | | [[File: | + | | [[File:core i5 logo (2015).png|50px|link=intel/core_i5]] || {{intel|Core i5}} || Mid-range Performance || [[hexa-core|Hexa]] || {{tchk|no}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} |
|- | |- | ||
− | + | | [[File:core i7 logo (2015).png|50px|link=intel/core_i7]] || {{intel|Core i7}} || High-end Performance || Hexa || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} | |
− | |||
− | |||
− | |||
− | | [[File:core i7 logo (2015).png|50px|link=intel/core_i7]] || {{intel|Core i7}} | ||
− | |||
− | |||
|} | |} | ||
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{| class="wikitable tc1 tc2 tc3 tc4 tc5" | {| class="wikitable tc1 tc2 tc3 tc4 tc5" | ||
! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model !! Stepping | ! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model !! Stepping | ||
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
| rowspan="2" | {{intel|Coffee Lake S|S|l=core}}/{{intel|Coffee Lake H|H|l=core}} || 0 || 0x6 || 0x9 || 0xE || 0xA | | rowspan="2" | {{intel|Coffee Lake S|S|l=core}}/{{intel|Coffee Lake H|H|l=core}} || 0 || 0x6 || 0x9 || 0xE || 0xA | ||
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| colspan="5" | Family 6 Model 158 Stepping 10 | | colspan="5" | Family 6 Model 158 Stepping 10 | ||
|- | |- | ||
− | | rowspan="2" | | + | | rowspan="2" | {{intel|Coffee Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || 0xA |
|- | |- | ||
− | | colspan="5" | Family 6 Model | + | | colspan="5" | Family 6 Model 142 Stepping 10 |
− | |||
− | |||
− | |||
− | |||
|} | |} | ||
− | |||
− | |||
== Architecture == | == Architecture == | ||
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** 50% larger [[last level cache]] (up to 12 MiB, from 8 MiB) | ** 50% larger [[last level cache]] (up to 12 MiB, from 8 MiB) | ||
** Coffee Lake Refresh | ** Coffee Lake Refresh | ||
− | *** 100% more [[physical core|cores]] | + | *** 100% more [[physical core|cores]] 8, from 4) |
*** 100% larger [[last level cache]] (up to 16 MiB, from 8 MiB) | *** 100% larger [[last level cache]] (up to 16 MiB, from 8 MiB) | ||
+ | |||
+ | * Core | ||
+ | ** LSD has been re-enabled (Previously {{\\|skylake_(server)#Front-end|disabled}}) | ||
* Chipset | * Chipset | ||
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**** fixed partition | **** fixed partition | ||
*** 1G page translations: | *** 1G page translations: | ||
− | **** 4 entries; | + | **** 4 entries; fully associative |
**** fixed partition | **** fixed partition | ||
** STLB | ** STLB | ||
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==== Front-end ==== | ==== Front-end ==== | ||
− | + | Note that a bug associated with the Loop Stream Detector (LSD) has been fixed with Coffee Lake. See {{\\|skylake_(server)#Front-end|Skylake (server) § Front-end}}. | |
− | |||
==== Scheduler Ports & Execution Units ==== | ==== Scheduler Ports & Execution Units ==== | ||
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<tr><th>Port 2</th><td>Load, AGU</td></tr> | <tr><th>Port 2</th><td>Load, AGU</td></tr> | ||
<tr><th>Port 3</th><td>Load, AGU</td></tr> | <tr><th>Port 3</th><td>Load, AGU</td></tr> | ||
− | <tr><th>Port 4</th><td>Store</td></tr> | + | <tr><th>Port 4</th><td>Store, AGU</td></tr> |
<tr><th>Port 7</th><td>AGU</td></tr> | <tr><th>Port 7</th><td>AGU</td></tr> | ||
</table> | </table> | ||
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| Windows || Linux || Windows || Linux || [[High Level Shading Language|HLSL]] || Windows || Linux || Windows || Linux | | Windows || Linux || Windows || Linux || [[High Level Shading Language|HLSL]] || Windows || Linux || Windows || Linux | ||
|- | |- | ||
− | | {{intel|UHD Graphics 630}} || | + | | {{intel|UHD Graphics 630}} || 23/24 || GT2 || {{intel|Coffee Lake S|S|l=core}} || - || colspan="2" style="text-align: center;" | '''1.0''' || style="text-align: center;" | '''12''' || style="text-align: center;" | '''N/A''' || style="text-align: center;" | '''5.1''' || style="text-align: center;" | '''4.5''' || style="text-align: center;" | '''4.5''' || style="text-align: center;" colspan="1" | '''2.1''' || style="text-align: center;" | '''2.0''' |
|} | |} | ||
Facts about "Coffee Lake - Microarchitectures - Intel"
codename | Coffee Lake + |
designer | Intel + |
first launched | October 5, 2017 + |
full page name | intel/microarchitectures/coffee lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + and dell + |
microarchitecture type | CPU + |
name | Coffee Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |