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== Architecture == | == Architecture == | ||
[[File:intel 8th gen core logs.png|right|thumb|250px|Coffee Lake is 8th Generation Core]] | [[File:intel 8th gen core logs.png|right|thumb|250px|Coffee Lake is 8th Generation Core]] | ||
− | While there is no change in pure IPC over Skylake and the actual microarchitecture is largely the same, Intel introduced a number of major architectural changes in Coffee Lake. In addition to improved performance brought by the uplift in [[binning]] as a result of the enhanced process, Coffee Lake also increased the number of cores by 50% | + | While there is no change in pure IPC over Skylake and the actual microarchitecture is largely the same, Intel introduced a number of major architectural changes in Coffee Lake. In addition to improved performance brought by the uplift in [[binning]] as a result of the enhanced process, Coffee Lake also increased the number of cores by 50%, enabling much higher multi-threaded performance. The enhanced manufacturing process should allow Coffee Lake chips to be highly [[overclockable]]. |
=== Key changes from {{\\|Kaby Lake}}=== | === Key changes from {{\\|Kaby Lake}}=== | ||
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==== Entire SoC Overview (hexa) ==== | ==== Entire SoC Overview (hexa) ==== | ||
[[File:coffee lake soc block diagram.svg|900px]] | [[File:coffee lake soc block diagram.svg|900px]] | ||
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==== Individual Core ==== | ==== Individual Core ==== | ||
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− | ::[[File:sandy bridge-coffee lake overview change.svg| | + | ::[[File:sandy bridge-coffee lake overview change.svg|500px|left]] |
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− | + | [[File:quad to hexa mainstream die areas.svg|500px|right]] | |
− | + | It can easily be seen how the natural evolution of [[Moore's Law]] and its affects on the die size of Intel's mainstream platform enables the addition of two more cores and their associated cache slices without sacrificing yield due to a bigger die. In fact, the hexa-core at 149 mm² is still considerably smaller than even the quad-core {{\\|Haswell}}-based chips. The pair of cores with their associated cache slices contributed an extra ~25mm². In fact, it can further be seen that even an 8-core Coffee Lake would be smaller than Haswell's quad-core at around 174 mm². It's worth noting that Coffee Lake is released concurrently with {{\\|Cannon Lake}} which is a [[10 nm]]-based microarchitecture for low-power mobile devices. Due to Intel's faithful [[die shrink]] of roughly x2.7 in density, an identical [[hexa-core]] Coffee Lake die on 10nm would result in a smaller die than any of the [[14 nm]] quad-core dies, possibly even the [[dual-core]] dies as well. | |
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{{clear}} | {{clear}} | ||
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== Configurability == | == Configurability == | ||
− | Coffee Lake builds upon the Skylake platform, with the addition of the first hexa | + | Coffee Lake builds upon the Skylake platform, with the addition of the first hexa core die. Currently, the Coffee Lake family consists out of three dies, that are aimed towards the high performance market. |
<gallery widths=300px heights=150px caption="Physical Layout Breakdown" style="float:left"> | <gallery widths=300px heights=150px caption="Physical Layout Breakdown" style="float:left"> | ||
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== Die == | == Die == | ||
− | Coffee Lake desktop and mobile come | + | Coffee Lake desktop and mobile come and 4 and 6 cores. Each variant has its own die. The major components of the die are: |
* System Agent | * System Agent | ||
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: [[File:coffee lake die (hexa core) (annotated).png|650px]] | : [[File:coffee lake die (hexa core) (annotated).png|650px]] | ||
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=== Additional Shots === | === Additional Shots === | ||
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<gallery mode=slideshow> | <gallery mode=slideshow> | ||
− | File:coffee lake wafer.png|Coffee Lake silicon [[wafer]] with 8th generation | + | File:coffee lake wafer.png|Coffee Lake silicon [[wafer]] with 8th generation core processor dies. |
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</gallery> | </gallery> | ||
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== Documents == | == Documents == | ||
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* [[:File:8th-gen-intel-core-product-overview.pdf|8th generation Core family product overview]] | * [[:File:8th-gen-intel-core-product-overview.pdf|8th generation Core family product overview]] | ||
* [[:File:8th-gen-intel-core-overview.pdf|8th generation Core product overview]] | * [[:File:8th-gen-intel-core-overview.pdf|8th generation Core product overview]] | ||
* [[:File:8th-gen-intel-core-product-brief.pdf|8th generation core product brief]] | * [[:File:8th-gen-intel-core-product-brief.pdf|8th generation core product brief]] | ||
* [[:File:8th-gen-intel-core-lineup-press-deck.pdf|8th generation core lineup]] | * [[:File:8th-gen-intel-core-lineup-press-deck.pdf|8th generation core lineup]] | ||
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== References == | == References == | ||
* Mark Bohr, Intel. Intel Technology and Manufacturing Day. Mar 28, 2017. | * Mark Bohr, Intel. Intel Technology and Manufacturing Day. Mar 28, 2017. | ||
* Intel 8th Generation Core announcement, Sept 25, 2017. | * Intel 8th Generation Core announcement, Sept 25, 2017. |
Facts about "Coffee Lake - Microarchitectures - Intel"
codename | Coffee Lake + |
designer | Intel + |
first launched | October 5, 2017 + |
full page name | intel/microarchitectures/coffee lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + and dell + |
microarchitecture type | CPU + |
name | Coffee Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |