From WikiChip
Editing intel/cores/skylake x refresh
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 48: | Line 48: | ||
{{comp table start}} | {{comp table start}} | ||
<table class="comptable sortable tc15"> | <table class="comptable sortable tc15"> | ||
− | + | <tr class="comptable-header"><th> </th><th colspan="14">List of Skylake X Processors</th></tr> | |
− | {{comp table header 1|cols=Price, Family, Launched, Cores, Threads | + | <tr class="comptable-header"><th> </th><th colspan="9">Main processor</th><th colspan="2">Cache</th><th>Memory</th><th>I/O</th><th>Feature Diff</th></tr> |
+ | {{comp table header 1|cols=Price, Family, Process, Launched, Cores, Threads, %Frequency, %Turbo, %TDP, %L2, %L3, Memory Type, Max [[PCIe]], Turbo Max}} | ||
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X Refresh]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X Refresh]] | ||
|?full page name | |?full page name | ||
Line 55: | Line 56: | ||
|?release price | |?release price | ||
|?microprocessor family | |?microprocessor family | ||
+ | |?process | ||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
|?thread count | |?thread count | ||
− | |||
|?base frequency#GHz | |?base frequency#GHz | ||
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
− | |? | + | |?tdp |
|?l2$ size | |?l2$ size | ||
|?l3$ size | |?l3$ size | ||
+ | |?supported memory type | ||
+ | |?Has subobject.max pcie lanes | ||
+ | |?has intel turbo boost max technology 3 0 | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=16:16 |
|mainlabel=- | |mainlabel=- | ||
}} | }} |
Facts about "Skylake X Refresh - Cores - Intel"
designer | Intel + |
first announced | October 8, 2018 + |
first launched | November 2018 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + and + |
manufacturer | Intel + |
microarchitecture | Skylake (server) + |
name | Skylake X Refresh + |
package | FCLGA-2066 + |
platform | Basin Falls Refresh + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket R4 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |