Editing intel/cores/skylake x

{{intel title|Skylake X|core}}
{{core
| name              = Skylake x
| image             = 
| image size        = 250px
| image 2           = 
| image 2 size      = 250px
| developer         = Intel
| manufacturer      = Intel
| first announced   = May 30, 2017
| first launched    = May 30, 2017
| isa               = x86-64
| microarch         = Kaby Lake
| word              = 64 bit
| proc              = 14 nm
| tech              = CMOS
| clock min         = 3,500 MHz
| clock max         = 4,300 MHz
| package           = FCLGA-2066
| socket            = Socket R4

| succession       = Yes
| predecessor      = Broadwell E
| predecessor link = intel/cores/broadwell e
| successor        = Kaby Lake X
| successor link   = intel/cores/kaby lake x
}}
@@ Line 1: / Line 1: @@
 {{intel title|Skylake X|core}}
 {{core
-|name=Skylake X
+| name              = Skylake x
-|image=skylake x (front).png
+| image             =
-|image 2=skylake x (back).png
+| image size        = 250px
-|developer=Intel
+| image 2           =
-|manufacturer=Intel
+| image 2 size      = 250px
-|first announced=May 30, 2017
+| developer         = Intel
-|first launched=June 26, 2017
+| manufacturer      = Intel
-|isa=x86-64
+| first announced   = May 30, 2017
-|isa family=x86
+| first launched    = May 30, 2017
-|microarch=Skylake (server)
+| isa               = x86-64
-|platform=Basin Falls
+| microarch         = Kaby Lake
-|word=64 bit
+| word              = 64 bit
-|proc=14 nm
+| proc              = 14 nm
-|tech=CMOS
+| tech              = CMOS
-|clock min=2,600 MHz
+| clock min         = 3,500 MHz
-|clock max=3,500 MHz
+| clock max         = 4,300 MHz
-|package name 1=intel,fclga_2066
+| package           = FCLGA-2066
-|predecessor=Broadwell E
+| socket            = Socket R4
-|predecessor link=intel/cores/broadwell e
-|successor=Skylake X Refresh
-|successor link=intel/cores/skylake x refresh
-|contemporary=Kaby Lake X
-|contemporary link=intel/cores/kaby lake x
-|package=FCLGA-2066
-|socket=Socket R4
-|succession=Yes
-}}
-'''Skylake X''' ('''SKL-X''') is the processor core for [[Intel]]'s high-end desktop (HEDT) microprocessor line based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture serving as a successor to {{intel|Broadwell E|l=core}}. Skylake X processors feature a large array of enhancements and improvements including the new {{x86|AVX-512}} extension. Unlike the mainstream Skylake processors, enthusiasts Skylake X models are fabricated on Intel's [[14 nm process|enhanced 14+ nm process]].
-== Overview ==
-Skylake X based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Skylake X are {{intel|Socket R4}} and use the {{intel|Lewisburg}} chipset ({{intel|Platform Controller Hub|HUB}}).
-=== Common Features ===
-All Skylake X processors have the following:
-* Quad-channel Memory
+| succession       = Yes
-** Up to DDR4-2400 / DDR4-2666
+| predecessor      = Broadwell E
-** Up to 128 GiB
+| predecessor link = intel/cores/broadwell e
-* 28x or 44x PCIe
+| successor        = Kaby Lake X
-* [[6 cores]] to [[18 cores]] with all models supporting {{intel|Hyper-Threading}})
+| successor link   = intel/cores/kaby lake x
-* Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, AVX2, and AVX-512)
-{{clear}}
-== Skylake X Processors ==
-<!-- NOTE:
-           This table is generated automatically from the data in the actual articles.
-           If a microprocessor is missing from the list, an appropriate article for it needs to be
-           created and tagged accordingly.
-           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
--->
-{{comp table start}}
-<table class="comptable sortable tc15">
-<tr class="comptable-header"><th>&nbsp;</th><th colspan="14">List of Skylake X Processors</th></tr>
-<tr class="comptable-header"><th>&nbsp;</th><th colspan="9">Main processor</th><th colspan="2">Cache</th><th>Memory</th><th>I/O</th><th>Feature Diff</th></tr>
-{{comp table header 1|cols=Price, Family, Process, Launched, Cores, Threads, %Frequency, %Turbo, %TDP, %L2, %L3, Memory Type, Max [[PCIe]], Turbo Max}}
-{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X]]
- |?full page name
- |?model number
- |?release price
- |?microprocessor family
- |?process
- |?first launched
- |?core count
- |?thread count
- |?base frequency#GHz
- |?turbo frequency (1 core)#GHz
- |?tdp
- |?l2$ size
- |?l3$ size
- |?supported memory type
- |?Has subobject.max pcie lanes
- |?has intel turbo boost max technology 3 0
- |format=template
- |template=proc table 3
- |userparam=16:16
- |mainlabel=-
 }}
-{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X]]}}
-</table>
-{{comp table end}}
-== See also ==
-{{intel skylake core see also}}
-* AMD
-** {{amd|Whitehaven|l=core}}
designer	Intel +
first announced	May 30, 2017 +
first launched	June 26, 2017 +
instance of	core +
isa	x86-64 +
isa family	x86 +
main image	+ and +
manufacturer	Intel +
microarchitecture	Skylake (server) +
name	Skylake X +
package	FCLGA-2066 +
platform	Basin Falls +
process	14 nm (0.014 μm, 1.4e-5 mm) +
socket	Socket R4 +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +