Editing intel/cores/silverthorne

{{intel title|Silverthorne|core}}
{{core
| name              = Silverthorne
| image             = silverthorne.png
| caption           = Packaged in FCBGA-441 (13x14) 
| image size        = 
| image 2           = silverthorne (437).png
| caption 2         = Packaged in FCBGA-437 (22x22)
| image 2 size      = 
| developer         = Intel
| manufacturer      = Intel
| first announced   = April 18, 2007
| first launched    = April 2, 2008
| isa               = x86-32
| microarch         = Bonnell
| word              = 32
| proc              = 45 nm
| tech              = CMOS
| clock min         = 800 MHz
| clock max         = 2,133.33 MHz
| package           = FCBGA-437
| package 2         = FCBGA-441
| socket            = BGA-437
| socket 2          = BGA-441

| succession       = Yes
| predecessor      = Stealey
| predecessor link = intel/cores/stealey
| successor        = Lincroft
| successor link   = intel/cores/lincroft
}}
'''Silverthorne''' is the core name for [[Intel]]'s first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture, replacing {{\\|Stealey}}. Those ultra-low power chips were manufactured on Intel's [[45 nm process]] and were specifically aimed for the [[Mobile Internet device]] (MID) market. Silverthorne-based processors are {{arch|32}} [[x86]] single core processors with TDP ranging from just 650 mW to 2.5 W. Silverthorne superseded by {{\\|Lincroft}} in 2010.

== Overview ==
All models are based on {{intel|Bonnell|l=arch}} manufactured on a [[45 nm process]] and implement [[x86-32]] with no {{arch|64}} support. This processor is designed to work with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as standard [[GTL]] mode.

=== Common Features ===
* '''TDP:''' 650 mW - 2.5 W
* '''ISA:''' Everything up to {{x86|SSSE3}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}})
* '''Tech:''' All models have {{intel|EIST}}
* '''Bus:''' 400-533 MT/s [[FSB]]
* {{intel|Poulsbo|l=chipset}} Chipset
* 47,212,207 transistors
* 3.1 mm x 7.8 mm die size
* 24.18 mm² die area
{{clear}}

== Members ==
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           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
{{comp table start}}
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Silverthorne-based Atom Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="3">Features</th></tr>
{{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, SDP, Speed, Rate, Package, {{intel|Hyper-Threading|HT}}, VT-x}}
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]]
 |?full page name
 |?model number
 |?release price
 |?process
 |?first launched
 |?core count
 |?thread count
 |?base frequency#GHz
 |?tdp#mW
 |?sdp#mW
 |?bus speed
 |?bus rate
 |?package
 |?has simultaneous multithreading
 |?has intel vt-x technology
 |format=template
 |template=proc table 3
 |userparam=15:14
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Atom]] [[core name::Silverthorne]]}}
</table>
{{comp table end}}

== Die Shot ==
[[File:AtomChipset-Processor Ruler.jpg|right|thumb|Processor next to its chipset.]]
{{see also|intel/microarchitectures/bonnell#Silverthorne|l1=Bonnell § Silverthorne Die}}
* [[45 nm process]]
* 9 metal layers
* 47,212,207 transistors
* 3.1 mm x 7.8 mm
* 24.18 mm² die size

[[File:Silverthorne die shot.jpg|550px]]


[[File:Silverthorne die shot (marked).png|550px]]

== See Also ==
{{intel bonnell core see also}}
* {{amd|Geode NX}}
designer	Intel +
first announced	April 18, 2007 +
first launched	April 2, 2008 +
instance of	core +
isa	x86-32 +
main image	+ and +
main image caption	Packaged in FCBGA-441 (13x14) + and Packaged in FCBGA-437 (22x22) +
manufacturer	Intel +
microarchitecture	Bonnell +
name	Silverthorne +
process	45 nm (0.045 μm, 4.5e-5 mm) +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +