Editing intel/cores/sandy bridge m

{{intel title|Sandy Bridge M|core}}
{{core
|name=Sandy Bridge M
|no image=Yes
|developer=Intel
|manufacturer=Intel
|first announced=December 30, 2010
|first launched=January 5, 2011
|isa=x86-64
|isa family=x86
|microarch=Sandy Bridge
|chipset=Cougar Point
|word=64 bit
|proc=32 nm
|tech=CMOS
|predecessor=Arrandale
|predecessor link=intel/cores/arrandale
|successor=Ivy Bridge M
|successor link=intel/cores/ivy bridge m
}}
'''Sandy Bridge M''' was a core name for [[Intel]]'s mobile processors based on the {{intel|Sandy Bridge|l=arch}} microarchitecture serving as a successor to {{\\|Arrandale}}. Those processors cover the entire mobile segment from budget processors all the way to high-end performance.

== Overview ==

=== Common Features ===
Sandy Bridge M can come in three different sockets, {{intel|FCBGA-1023}}, {{intel|FCBGA-1224}}, and {{intel|rPGA988B}}. All models are based on the {{intel|Sandy Bridge|l=arch}} microarchitecture which incorporated both the IMC, integrated graphics, and the CPU [[physical core|cores]] onto the same monolithic die. All models communicate with the [[chipset]] over [[Intel]]'s {{intel|DMI 2.0}} interconnect.

=== Common Features ===
All Sandy Bridge M processors have the following:

* Dual-channel Memory
** Up to DDR3-1333, DDR3-1600 (on the high-end models)
** 8-32 GiB
* 16x PCIe
* [[2 cores|2]]-[[4 cores|4]]
* '''ISA:''' Everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX)
** Note that {{intel|Pentium (2009)|Pentium}} and {{intel|Celeron}} models only support up to {{x86|SSE4.2}}
* '''Tech:''' {{intel|Speed Shift}}, {{intel|Flex Memory}}, {{intel|Fast Memory Access}}
* Graphics
** {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} (GT1) or {{intel|HD Graphics 3000}} (GT2)
** 2 independent displays supported

{{clear}}

== Sandy Bridge M Processors ==
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           Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc16 tc17 tc18 tc19 tc20 tc21">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="21">List of Sandy Bridge M Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="11">Main processor</th><th colspan="3">IGP</th><th colspan="6">Major Feature Diff</th></tr>
<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">L4$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th>{{intel|turbo boost|TBT}}</th><th>HT</th><th>AVX2</th><th>TXT</th><th>TSX</th><th>vPro</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Sandy Bridge M]]
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 |?max memory#GiB
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 |?has intel turbo boost technology 2_0
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 |searchlabel=
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}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Sandy Bridge M]]}}
</table>
{{comp table end}}

== See also ==
{{intel sandy bridge core see also}}
* {{intel|Westmere|l=arch}}
** {{intel|Arrandale|l=core}}
chipset	Cougar Point +
designer	Intel +
first announced	December 30, 2010 +
first launched	January 5, 2011 +
instance of	core +
isa	x86-64 +
isa family	x86 +
manufacturer	Intel +
microarchitecture	Sandy Bridge +
name	Sandy Bridge M +
process	32 nm (0.032 μm, 3.2e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +