Editing intel/cores/kaby lake y

{{intel title|Kaby Lake Y|core}}
{{core
| name              = Kaby Lake Y
| developer         = Intel
| manufacturer      = Intel
| first announced   = August 30, 2016
| first launched    = August 30, 2016
| isa               = x86-64
| microarch         = Kaby Lake
| word              = 64 bit
| proc              = 14 nm
| tech              = CMOS
| clock min         = 1,000 MHz
| clock max         = 3,600 MHz
| package           = FCBGA-1515
| socket            = BGA-1515

| succession       = Yes
| predecessor      = Skylake Y
| predecessor link = intel/cores/skylake y
| successor        = Cannonlake Y
| successor link   = intel/cores/cannonlake y
}}
'''Kaby Lake Y''' ('''KBL-Y''') is the name of the core for [[Intel]]'s ultra-low power line of processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake Y|l=core}} core. These chips are primarily targeted towards 2-in-1s detachable, tablets, and computer sticks. Kaby Lake Y processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.

== Overview ==
Kaby Lake Y based processors are a single-chip solution - the [[chipset]] is packaged in the same physical casing as the CPU in a [[multi-chip package]] (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate.
=== Common Features ===
All Kaby Lake Y processors have the following:

* Dual-channel Memory
** Up to DDR3L-1600, LPDDR3-1866
** Up to 16 GiB
* 10-12x PCIe
* [[dual-core]] with 4 threads
* Everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX) (not all Y models support {{x86|AVX2}})
* Graphics
** {{intel|HD Graphics 615}} (Gen 9.5 LP GT2)
** Base frequency of 350 MHz
** Burst frequency of 1-1.15 GHz

== Kaby Lake Y Processors ==
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           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc15 tc16 tc17 tc18 tc19">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="18">List of Kaby Lake Y Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="5">Major Feature Diff</th></tr>
<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th>{{intel|turbo boost|TBT}}</th><th>AVX2</th><th>TXT</th><th>TSX</th><th>vPro</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake Y]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?microprocessor family
 |?core count
 |?thread count
 |?l3$ size
 |?tdp
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?max memory#GiB
 |?integrated gpu
 |?integrated gpu base frequency
 |?integrated gpu max frequency
 |?has intel turbo boost technology 2.0
 |?has advanced vector extensions 2
 |?has intel trusted execution technology
 |?has transactional synchronization extensions
 |?has intel vpro technology
 |format=template
 |template=proc table 3
 |searchlabel=
 |sort=microprocessor family, model number
 |order=asc,asc
 |userparam=20:16
 |mainlabel=-
 |limit=100
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake Y]]}}
</table>
{{comp table end}}

== See also ==
* {{intel|Kaby Lake|l=arch}}
** {{intel|Kaby Lake U|l=core}}
** {{intel|Kaby Lake H|l=core}}
** {{intel|Kaby Lake S|l=core}}
* {{intel|Skylake Y|l=core}}
* {{intel|Goldmont|l=arch}}
@@ Line 1: / Line 1: @@
 {{intel title|Kaby Lake Y|core}}
 {{core
-|name=Kaby Lake Y
+| name              = Kaby Lake Y
-|image=kaby lake y (front).png
+| developer         = Intel
-|back image=kaby lake y (back).png
+| manufacturer      = Intel
-|developer=Intel
+| first announced   = August 30, 2016
-|manufacturer=Intel
+| first launched    = August 30, 2016
-|first announced=August 30, 2016
+| isa               = x86-64
-|first launched=August 30, 2016
+| microarch         = Kaby Lake
-|isa=x86-64
+| word              = 64 bit
-|isa family=x86
+| proc              = 14 nm
-|microarch=Kaby Lake
+| tech              = CMOS
-|word=64 bit
+| clock min         = 1,000 MHz
-|proc=14 nm
+| clock max         = 3,600 MHz
-|tech=CMOS
+| package           = FCBGA-1515
-|clock min=1,000 MHz
+| socket            = BGA-1515
-|clock max=1,600 MHz
-|predecessor=Skylake Y
+| succession       = Yes
-|predecessor link=intel/cores/skylake y
+| predecessor      = Skylake Y
-|successor=Amber Lake Y
+| predecessor link = intel/cores/skylake y
-|successor link=intel/cores/amber lake y
+| successor        = Cannonlake Y
-|package=FCBGA-1515
+| successor link   = intel/cores/cannonlake y
-|socket=BGA-1515
-|succession=Yes
 }}
 '''Kaby Lake Y''' ('''KBL-Y''') is the name of the core for [[Intel]]'s ultra-low power line of processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake Y|l=core}} core. These chips are primarily targeted towards 2-in-1s detachable, tablets, and computer sticks. Kaby Lake Y processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.
 == Overview ==
-Kaby Lake Y based processors are a single-chip solution - the [[chipset]] is packaged in the same physical casing as the CPU in a [[multi-chip package]] (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate. KBL-Y chips use {{intel|BGA-1515|Socket BGA-1515}}.
+Kaby Lake Y based processors are a single-chip solution - the [[chipset]] is packaged in the same physical casing as the CPU in a [[multi-chip package]] (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate.
 === Common Features ===
 All Kaby Lake Y processors have the following:
@@ Line 36: / Line 34: @@
 * 10-12x PCIe
 * [[dual-core]] with 4 threads
-* Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) (not all Y models support {{x86|AVX}}/{{x86|AVX2}})
+* Everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX) (not all Y models support {{x86|AVX2}})
-* Support [[RAID]], [[AHCI]], {{intel|Smart Response}}, [[High Definition Audio]], 6x [[USB 3.0]] ports, 6x [[USB 2.0]] ports, 4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]]
 * Graphics
-** {{intel|HD Graphics 615}} ({{intel|Gen9.5|l=arch}} GT2)
+** {{intel|HD Graphics 615}} (Gen 9.5 LP GT2)
-** 3 independent displays supported
 ** Base frequency of 350 MHz
 ** Burst frequency of 1-1.15 GHz
-{{clear}}
 == Kaby Lake Y Processors ==
 <!-- NOTE:
@@ Line 57: / Line 52: @@
 <tr class="comptable-header"><th>&nbsp;</th><th colspan="18">List of Kaby Lake Y Processors</th></tr>
 <tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="5">Major Feature Diff</th></tr>
-{{comp table header 1|cols=Launched, Price, Family, %Cores, %Threads, %L3$, TDP, %Frequency, %Turbo, %Max Memory, Name, %Frequency, %Turbo, {{intel|turbo boost|TBT}}, AVX2, TXT, TSX, vPro}}
+<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th>{{intel|turbo boost|TBT}}</th><th>AVX2</th><th>TXT</th><th>TSX</th><th>vPro</th></tr>
 {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake Y]]
   |?full page name
@@ Line 74: / Line 69: @@
   |?integrated gpu base frequency
   |?integrated gpu max frequency
-  |?has intel turbo boost technology 2_0
+  |?has intel turbo boost technology 2.0
   |?has advanced vector extensions 2
   |?has intel trusted execution technology
@@ Line 93: / Line 88: @@
 == See also ==
-[[File:kaby lake y (side).png|thumb|right|Side view of the KBL-Y showing its thin profile.]]
+* {{intel|Kaby Lake|l=arch}}
-{{intel kaby lake core see also}}
+** {{intel|Kaby Lake U|l=core}}
-* {{intel|Skylake|l=arch}}
+** {{intel|Kaby Lake H|l=core}}
-** {{intel|Skylake Y|l=core}}
+** {{intel|Kaby Lake S|l=core}}
+* {{intel|Skylake Y|l=core}}
+* {{intel|Goldmont|l=arch}}
back image	+
designer	Intel +
first announced	August 30, 2016 +
first launched	August 30, 2016 +
instance of	core +
isa	x86-64 +
isa family	x86 +
main image	+
manufacturer	Intel +
microarchitecture	Kaby Lake +
name	Kaby Lake Y +
process	14 nm (0.014 μm, 1.4e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +