Editing intel/cores/kaby lake h

{{intel title|Kaby Lake H|core}}
{{core
| name              = Kaby Lake H
| developer         = Intel
| manufacturer      = Intel
| first announced   = January 3, 2017
| first launched    = January 3, 2017
| isa               = x86-64
| microarch         = Kaby Lake
| word              = 64 bit
| proc              = 14 nm
| tech              = CMOS
| clock min         = 
| clock max         = 
| package           = FCBGA-1440
| socket            = BGA-1440

| succession       = Yes
| predecessor      = Skylake H
| predecessor link = intel/cores/skylake h
| successor        = Cannonlake H
| successor link   = intel/cores/cannonlake h
}}
'''Kaby Lake H''' ('''KBL-H''') is the name of the core for [[Intel]]'s line of performance mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake H|l=core}} core. These chips are primarily targeted towards ultimate mobile performance, mobile workstations, and performance embedded devices. Kaby Lake H processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.

== Overview ==
Kaby Lake H based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake H are {{intel|LGA-1151|Socket LGA-1151}} and use {{intel|Union Point}} chipset ({{intel|Platform Controller Hub|HUB}}) but they may also use previous generation ({{intel|Skylake H|l=core}}) {{intel|Sunrise Point}} via a firmware upgrade. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane.

=== Common Features ===
All Kaby Lake H processors have the following:

* Dual-channel Memory
** Up to LPDDR3-2133, DDR3L-1600, DDR4-2400 general H models
** Up to DDR3L-1600, DDR4-2133 for embedded/low-power H models
** Up to 64 GiB
* 16x PCIe (4 of the 20 are used by the bus as described above)
* [[dual-core|2]] to [[quad-core|4]] core with 2 to 8 threads (not all H models support {{intel|Hyper-Threading}})
* Everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX) (not all H models support {{x86|AVX2}})
* Graphics
** {{intel|HD Graphics 630}} (9.5Gen LP GT2) or {{intel|HD Graphics P630}} (9.5Gen LP GT2; found on {{intel|Xeon E3|Xeon}} models only)
** Base frequency of 350 MHz
** Burst frequency of 0.95-1.1 GHz

== Kaby Lake H Processors ==
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           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc17 tc18 tc19 tc20 tc21 tc22">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Kaby Lake H Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="6">Major Feature Diff</th></tr>
<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th>{{intel|turbo boost|TBT}}</th><th>HT</th><th>AVX2</th><th>TXT</th><th>TSX</th><th>vPro</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake H]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?microprocessor family
 |?core count
 |?thread count
 |?l3$ size
 |?tdp
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?max memory#GiB
 |?integrated gpu
 |?integrated gpu base frequency
 |?integrated gpu max frequency
 |?has intel turbo boost technology 2.0
 |?has simultaneous multithreading
 |?has advanced vector extensions 2
 |?has intel trusted execution technology
 |?has transactional synchronization extensions
 |?has intel vpro technology
 |format=template
 |template=proc table 3
 |searchlabel=
 |sort=microprocessor family, model number
 |order=asc,asc
 |userparam=21:16
 |mainlabel=-
 |limit=100
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake H]]}}
</table>
{{comp table end}}

== See also ==
* {{intel|Kaby Lake|l=arch}}
** {{intel|Kaby Lake Y|l=core}}
** {{intel|Kaby Lake U|l=core}}
** {{intel|Kaby Lake S|l=core}}
* {{intel|Skylake H|l=core}}
* {{intel|Goldmont|l=arch}}
@@ Line 1: / Line 1: @@
 {{intel title|Kaby Lake H|core}}
 {{core
-|name=Kaby Lake H
+| name              = Kaby Lake H
-|image=kaby lake h (front).png
+| developer         = Intel
-|image size=250px
+| manufacturer      = Intel
-|image 2=kaby lake h (back).png
+| first announced   = January 3, 2017
-|image 2 size=250px
+| first launched    = January 3, 2017
-|developer=Intel
+| isa               = x86-64
-|manufacturer=Intel
+| microarch         = Kaby Lake
-|first announced=January 3, 2017
+| word              = 64 bit
-|first launched=January 3, 2017
+| proc              = 14 nm
-|isa=x86-64
+| tech              = CMOS
-|isa family=x86
+| clock min         =
-|microarch=Kaby Lake
+| clock max         =
-|word=64 bit
+| package           = FCBGA-1440
-|proc=14 nm
+| socket            = BGA-1440
-|tech=CMOS
-|clock min=2,100 MHz
+| succession       = Yes
-|clock max=3,100 MHz
+| predecessor      = Skylake H
-|predecessor=Skylake H
+| predecessor link = intel/cores/skylake h
-|predecessor link=intel/cores/skylake h
+| successor        = Cannonlake H
-|successor=Coffee Lake H
+| successor link   = intel/cores/cannonlake h
-|successor link=intel/cores/coffee lake h
-|package=FCBGA-1440
-|socket=BGA-1440
-|succession=Yes
 }}
 '''Kaby Lake H''' ('''KBL-H''') is the name of the core for [[Intel]]'s line of performance mobile processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake H|l=core}} core. These chips are primarily targeted towards ultimate mobile performance, mobile workstations, and performance embedded devices. Kaby Lake H processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.
 == Overview ==
-Kaby Lake H based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake H are {{intel|BGA-1440|Socket BGA-1440}} and use {{intel|Union Point}} chipset ({{intel|Platform Controller Hub|HUB}}) but they may also use previous generation ({{intel|Skylake H|l=core}}) {{intel|Sunrise Point}} via a firmware upgrade. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane.
+Kaby Lake H based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake H are {{intel|LGA-1151|Socket LGA-1151}} and use {{intel|Union Point}} chipset ({{intel|Platform Controller Hub|HUB}}) but they may also use previous generation ({{intel|Skylake H|l=core}}) {{intel|Sunrise Point}} via a firmware upgrade. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane.
 === Common Features ===
@@ Line 40: / Line 36: @@
 * 16x PCIe (4 of the 20 are used by the bus as described above)
 * [[dual-core|2]] to [[quad-core|4]] core with 2 to 8 threads (not all H models support {{intel|Hyper-Threading}})
-* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, AVX2)
+* Everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX) (not all H models support {{x86|AVX2}})
 * Graphics
-** {{intel|HD Graphics 630}} ({{intel|Gen9.5|l=arch}} GT2) or {{intel|HD Graphics P630}} ({{intel|Gen9.5|l=arch}} GT2; found on {{intel|Xeon E3|Xeon}} models only)
+** {{intel|HD Graphics 630}} (9.5Gen LP GT2) or {{intel|HD Graphics P630}} (9.5Gen LP GT2; found on {{intel|Xeon E3|Xeon}} models only)
 ** Base frequency of 350 MHz
 ** Burst frequency of 0.95-1.1 GHz
-{{clear}}
 == Kaby Lake H Processors ==
@@ Line 57: / Line 51: @@
 -->
 {{comp table start}}
-<table class="comptable sortable tc15 tc16 tc17 tc18 tc19 tc20">
+<table class="comptable sortable tc17 tc18 tc19 tc20 tc21 tc22">
 <tr class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Kaby Lake H Processors</th></tr>
 <tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="6">Major Feature Diff</th></tr>
@@ Line 77: / Line 71: @@
   |?integrated gpu base frequency
   |?integrated gpu max frequency
-  |?has intel turbo boost technology 2_0
+  |?has intel turbo boost technology 2.0
   |?has simultaneous multithreading
   |?has advanced vector extensions 2
@@ Line 97: / Line 91: @@
 == See also ==
-{{intel kaby lake core see also}}
+* {{intel|Kaby Lake|l=arch}}
-* {{intel|Skylake|l=arch}}
+** {{intel|Kaby Lake Y|l=core}}
-** {{intel|Skylake H|l=core}}
+** {{intel|Kaby Lake U|l=core}}
+** {{intel|Kaby Lake S|l=core}}
+* {{intel|Skylake H|l=core}}
+* {{intel|Goldmont|l=arch}}
designer	Intel +
first announced	January 3, 2017 +
first launched	January 3, 2017 +
instance of	core +
isa	x86-64 +
isa family	x86 +
main image	+ and +
manufacturer	Intel +
microarchitecture	Kaby Lake +
name	Kaby Lake H +
process	14 nm (0.014 μm, 1.4e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +