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Latest revision | Your text | ||
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|isa family=x86 | |isa family=x86 | ||
|microarch=Ice Lake (server) | |microarch=Ice Lake (server) | ||
− | |||
|word=64 bit | |word=64 bit | ||
|proc=10 nm | |proc=10 nm | ||
|tech=CMOS | |tech=CMOS | ||
− | |package | + | |package module 1={{packages/intel/fclga-4189}} |
|predecessor=Cascade Lake SP | |predecessor=Cascade Lake SP | ||
|predecessor link=intel/cores/cascade lake sp | |predecessor link=intel/cores/cascade lake sp |
Facts about "Ice Lake SP - Cores - Intel"
designer | Intel + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | Intel + |
microarchitecture | Ice Lake (server) + |
name | Ice Lake SP + |
package | FCLGA-4189 + |
platform | Whitley + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
socket | LGA-4189 + and Socket W + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |