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<table class="comptable sortable tc4 tc5 tc13 tc14"> | <table class="comptable sortable tc4 tc5 tc13 tc14"> | ||
<tr class="comptable-header"><th> </th><th colspan="19">List of Skylake-based Core X Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="19">List of Skylake-based Core X Processors</th></tr> | ||
− | <tr class="comptable-header"><th> </th><th colspan=" | + | <tr class="comptable-header"><th> </th><th colspan="9">Main processor</th><th colspan="2">Memory</th><th>I/O</th><th>Features</th></tr> |
− | {{comp table header 1|cols=Price, Launched, Cores, Threads, L2$, L3$ | + | {{comp table header 1|cols=Price, Launched, Cores, Threads, L2$, L3$, Frequency, Turbo, TDP, Max Mem, Memory Type, Max [[PCIe]], Turbo Max}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X]] [[microarchitecture::Skylake (server)]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Skylake X]] [[microarchitecture::Skylake (server)]] | ||
|?full page name | |?full page name | ||
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|?l2$ size | |?l2$ size | ||
|?l3$ size | |?l3$ size | ||
− | |||
|?base frequency#GHz | |?base frequency#GHz | ||
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
− | |? | + | |?tdp |
+ | |?max memory#GiB | ||
|?supported memory type | |?supported memory type | ||
|?Has subobject.max pcie lanes | |?Has subobject.max pcie lanes |
Facts about "Core X - Intel"
designer | Intel + |
first announced | May 30, 2017 + |
full page name | intel/core x + |
instance of | microprocessor family + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + and Kaby Lake + |
name | Core X + |
package | FCLGA-2066 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket R + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |