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Latest revision | Your text | ||
Line 12: | Line 12: | ||
|locked=Yes | |locked=Yes | ||
|frequency=1,500 MHz | |frequency=1,500 MHz | ||
+ | |turbo frequency1=2,600 MHz | ||
|bus type=OPI | |bus type=OPI | ||
|bus rate=4 GT/s | |bus rate=4 GT/s | ||
Line 18: | Line 19: | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Cannon Lake | |microarch=Cannon Lake | ||
+ | |chipset=Cannon Point | ||
|core name=Cannon Lake Y | |core name=Cannon Lake Y | ||
|core family=6 | |core family=6 | ||
+ | |core model=102 | ||
|process=10 nm | |process=10 nm | ||
|technology=CMOS | |technology=CMOS | ||
Line 25: | Line 28: | ||
|core count=2 | |core count=2 | ||
|thread count=4 | |thread count=4 | ||
+ | |max cpus=1 | ||
|max memory=16 GiB | |max memory=16 GiB | ||
− | | | + | |tdp=4.5 W |
}} | }} | ||
− | '''Core M3-8114Y''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor | + | '''Core M3-8114Y''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2018]]. This chip, which is based on the {{intel|Cannon Lake|l=arch}} microarchitecture, is fabricated on Intel's [[10 nm process]]. The M3-8114Y operates at 1.5 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 2.6 GHz. The processor supports up to 16 GiB of dual-channel LPDDR4X-2133 memory and incorporates Intel's {{intel|HD Graphics 7??}} [[IGP]] operating at ? MHz with a burst frequency of ? MHz. |
{{unknown features}} | {{unknown features}} | ||
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