From WikiChip
Difference between revisions of "intel/core i7/i7-8600u"
Line 1:
Line 1: − {{intel title|Core i7-8600U}}
+ #REDIRECT [[intel/cores /kaby lake r]]
− {{mpu
− |future=Yes
− |name=Core i7-8600U
− |no image=Yes
− |designer=Intel
− |manufacturer=Intel
− |model number=i7-8600U
− |market=Mobile
− |family=Core i7
− |series=i7-8000
− |locked=Yes
− |bus type=OPI
− |bus rate=4 GT/s
− |isa=x86-64
− |isa family=x86
− |microarch=Coffee Lake
− |platform=Coffee Lake
− |core name=Coffee Lake U
− |core family=6
− |process=14 nm
− |technology=CMOS
− |word size=64 bit
− |core count=4
− |thread count=8
− |max cpus=1
− |max memory=32 GiB
− |v core min=0.55 V
− |v core max=1.52 V
− |tdp=15 W
− |tjunc min=0 °C
− |tjunc max=100 °C
− |tstorage min=-25 °C
− |tstorage max=125 °C
− }}
− '''Core i7-8600U''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor set to be introduced by [[Intel]] in late [[2017]]. This chip, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm++ process]]. The i7-8600U operates at ? GHz with a TDP of 15 W supporting a {{intel|Turbo Boost}} frequency of ? GHz. The processor supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory.
−
− == Cache ==
− {{main|intel/microarchitectures/coffee lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
− {{cache size
− |l1 cache=256 KiB
− |l1i cache=128 KiB
− |l1i break=4x32 KiB
− |l1i desc=8-way set associative
− |l1d cache=128 KiB
− |l1d break=4x32 KiB
− |l1d desc=8-way set associative
− |l1d policy=write-back
− |l2 cache=1 MiB
− |l2 break=4x256 KiB
− |l2 desc=4-way set associative
− |l2 policy=write-back
− |l3 cache=8 MiB
− |l3 break=4x2 MiB
− |l3 desc=12-way set associative
− |l3 policy=write-back
− }}
−
− == Memory controller ==
− {{memory controller
− |type=LPDDR3-1866
− |type 2=DDR3L-1600
− |type 3=DDR4-2133
− |ecc=No
− |max mem=32 GiB
− |controllers=1
− |channels=2
− |max bandwidth=31.79 GiB/s
− |bandwidth schan=15.89 GiB/s
− |bandwidth dchan=31.79 GiB/s
− }}
−
− == Expansions ==
− {{expansions
− | pcie revision = 3.0
− | pcie lanes = 12
− | pcie config = 1x4
− | pcie config 2 = 2x2
− | pcie config 3 = 1x2+2x1
− | pcie config 4 = 4x1
− }}
−
− == Graphics ==
− {{empty section}}
−
− == Features ==
− {{x86 features
− |real=Yes
− |protected=Yes
− |smm=Yes
− |fpu=Yes
− |x8616=Yes
− |x8632=Yes
− |x8664=Yes
− |nx=Yes
− |3dnow=No
− |e3dnow=No
− |mmx=Yes
− |emmx=Yes
− |sse=Yes
− |sse2=Yes
− |sse3=Yes
− |ssse3=Yes
− |sse41=Yes
− |sse42=Yes
− |sse4a=No
− |avx=Yes
− |avx2=Yes
−
− |abm=Yes
− |tbm=No
− |bmi1=Yes
− |bmi2=Yes
− |fma3=Yes
− |fma4=No
− |aes=Yes
− |rdrand=Yes
− |sha=No
− |xop=No
− |adx=Yes
− |clmul=Yes
− |f16c=Yes
− |tbt1=No
− |tbt2=Yes
− |tbmt3=No
− |bpt=No
− |eist=Yes
− |sst=Yes
− |flex=Yes
− |fastmem=No
− |isrt=Yes
− |sba=No
− |mwt=Yes
− |sipp=Yes
− |att=No
− |ipt=No
− |tsx=Yes
− |txt=Yes
− |ht=Yes
− |vpro=Yes
− |vtx=Yes
− |vtd=Yes
− |ept=Yes
− |mpx=Yes
− |sgx=Yes
− |securekey=Yes
− |osguard=Yes
− |smartmp=No
− |powernow=No
− |amdv=No
− |rvi=No
− }}
Latest revision as of 05:14, 21 August 2017
