Semiconductor & Computer Engineering
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Difference between revisions of "intel/core i5/i5-520m"
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| clock multiplier = 18 | | clock multiplier = 18 | ||
| s-spec = SLBNB | | s-spec = SLBNB | ||
| + | | s-spec 2 = SLBNA | ||
| + | | s-spec 3 = SLBU3 | ||
| + | | s-spec 4 = SLBU4 | ||
| s-spec qs = | | s-spec qs = | ||
| cpuid = | | cpuid = | ||
}} | }} | ||
'''Core i5-520M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core), is manufactured on a [[32 nm process]]. This MPU operates at a base frequency of 2.40 GHz with a {{intel|Turbo Boost}} frequency of 2.93 GHz and a TDP of 35 W. This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 766.00 MHz. | '''Core i5-520M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core), is manufactured on a [[32 nm process]]. This MPU operates at a base frequency of 2.40 GHz with a {{intel|Turbo Boost}} frequency of 2.93 GHz and a TDP of 35 W. This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 766.00 MHz. | ||
Revision as of 18:02, 29 November 2016
Template:mpu Core i5-520M is a 64-bit x86 dual-core mobile microprocessor introduced by Intel in 2010. This processor, which is based on the Westmere microarchitecture (Arrandale core), is manufactured on a 32 nm process. This MPU operates at a base frequency of 2.40 GHz with a Turbo Boost frequency of 2.93 GHz and a TDP of 35 W. This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 766.00 MHz.
