Semiconductor & Computer Engineering
From WikiChip
Editing intel/core i3
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
| Latest revision | Your text | ||
| Line 10: | Line 10: | ||
| first announced = June 17, 2009 | | first announced = June 17, 2009 | ||
| first launched = January 04, 2010 | | first launched = January 04, 2010 | ||
| − | |||
| − | |||
| microarch = Westmere | | microarch = Westmere | ||
| microarch 2 = Sandy Bridge | | microarch 2 = Sandy Bridge | ||
| Line 20: | Line 18: | ||
| microarch 7 = Kaby Lake | | microarch 7 = Kaby Lake | ||
| microarch 8 = Coffee Lake | | microarch 8 = Coffee Lake | ||
| − | |||
| word = 64 bit | | word = 64 bit | ||
| proc = 32 nm | | proc = 32 nm | ||
| Line 26: | Line 23: | ||
| proc 3 = 14 nm | | proc 3 = 14 nm | ||
| tech = CMOS | | tech = CMOS | ||
| − | | clock min = | + | | clock min = 1.5 GHz |
| − | | clock max = | + | | clock max = 5 GHz |
| package = FCLGA-1168 | | package = FCLGA-1168 | ||
| package 1 = FCLGA-1151 | | package 1 = FCLGA-1151 | ||
| Line 44: | Line 41: | ||
| socket 7 = Socket G3 | | socket 7 = Socket G3 | ||
| − | | succession = | + | | succession = No |
| − | |||
| − | |||
| successor = | | successor = | ||
| successor link = | | successor link = | ||
}} | }} | ||
| − | '''Core i3''' is family of low-end performance processors introduced by [[Intel]] since 2010 | + | '''Core i3''' is family of low-end performance processors introduced by [[Intel]] since 2010 |
== Overview == | == Overview == | ||
| − | + | in mid-2009, but the Core i3 was not official launched until January 04, 2010. Core i3 microprocessors are considered performance processors, but generally sit on the low side of the scale. They sit below the {{intel|Core i5}} and well below the {{intel|Core i7}} families, making it fairly decent for multitasking and somewhat OK budget gaming. | |
All Core i3 processors up to Coffee Lake are dual-core. | All Core i3 processors up to Coffee Lake are dual-core. | ||
| Line 68: | Line 63: | ||
* '''Chipset Interconnect:''' {{intel|DMI}} 1.0 (2.5 GT/s) | * '''Chipset Interconnect:''' {{intel|DMI}} 1.0 (2.5 GT/s) | ||
* '''TDP:''' 18 W, 35 [[Watt|W]] | * '''TDP:''' 18 W, 35 [[Watt|W]] | ||
| − | |||
| − | |||
<!-- NOTE: | <!-- NOTE: | ||
| Line 128: | Line 121: | ||
{{main|intel/microarchitectures/sandy bridge|l1=Sandy Bridge Microarchitecture}} | {{main|intel/microarchitectures/sandy bridge|l1=Sandy Bridge Microarchitecture}} | ||
=== Mobile === | === Mobile === | ||
| − | + | All Core i3 has the following features in common: | |
* '''Chipset Interconnect:''' DMI 2.0 (5 GT/s) | * '''Chipset Interconnect:''' DMI 2.0 (5 GT/s) | ||
* '''TDP:''' 17 W, 35 W | * '''TDP:''' 17 W, 35 W | ||
| − | |||
| − | |||
| − | |||
| − | |||
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
| Line 266: | Line 255: | ||
==== Mobile ==== | ==== Mobile ==== | ||
{{see also|intel/cores/skylake u|intel/cores/skylake u|l1=Skylake U|l2=Skylake Y}} | {{see also|intel/cores/skylake u|intel/cores/skylake u|l1=Skylake U|l2=Skylake Y}} | ||
| − | + | ||
<!-- NOTE: | <!-- NOTE: | ||
| Line 310: | Line 299: | ||
Desktop 7th generation Core i3 processors were launched in January of [[2017]]. While their clock-for-clock performance is identical to their 6th generation counterparts, they are clocked higher which allowed for a slight performance increase. All desktop models use {{intel|LGA-1151|Socket LGA-1151}} and have the following common features: | Desktop 7th generation Core i3 processors were launched in January of [[2017]]. While their clock-for-clock performance is identical to their 6th generation counterparts, they are clocked higher which allowed for a slight performance increase. All desktop models use {{intel|LGA-1151|Socket LGA-1151}} and have the following common features: | ||
* '''TDP:''' 35-60 W | * '''TDP:''' 35-60 W | ||
| − | |||
| − | |||
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
| Line 355: | Line 342: | ||
=== Mobile === | === Mobile === | ||
| − | + | ||
* '''TDP:''' 15-35 W | * '''TDP:''' 15-35 W | ||
| − | |||
| − | |||
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
| Line 400: | Line 385: | ||
* '''TDP:''' 15-54 W | * '''TDP:''' 15-54 W | ||
| − | |||
| − | |||
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
| Line 509: | Line 492: | ||
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
== See also == | == See also == | ||
{{intel core see also}} | {{intel core see also}} | ||
Facts about "Core i3 - Intel"
| designer | Intel + |
| first announced | June 17, 2009 + |
| first launched | January 4, 2010 + |
| full page name | intel/core i3 + |
| instance of | microprocessor family + |
| instruction set architecture | IA-32 + and x86-64 + |
| main designer | Intel + |
| manufacturer | Intel + |
| microarchitecture | Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell +, Skylake +, Kaby Lake +, Coffee Lake + and Ice Lake + |
| name | Intel Core i3 + |
| package | FCLGA-1168 +, FCLGA-1150 +, FCLGA-1155 +, FCLGA-1156 +, FCBGA-1288 +, FCBGA-1023 + and FCPGA-988 + |
| process | 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | LGA-1151 +, LGA-1150 +, LGA-1155 +, LGA-1156 +, Socket G1 +, Socket G2 + and Socket G3 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
