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| image            = poulsbo sch.png
 
| image            = poulsbo sch.png
 
| image size        =  
 
| image size        =  
| caption          = Original package
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| image 2          =  
| image 2          = poulsbo sch (large package).png
 
 
| image 2 size      =  
 
| image 2 size      =  
| caption 2        = A larger package was introduced in early 2009
 
 
| developer        = Intel
 
| developer        = Intel
 
| developer 2      = Imagination Technologies
 
| developer 2      = Imagination Technologies
 
| manufacturer      = Intel
 
| manufacturer      = Intel
| first announced  = April 18, 2007
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| first announced  = March 2, 2008
| first launched    = March 2, 2008
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| first launched    =  
 
| proc              = 0.13 μm
 
| proc              = 0.13 μm
 
| tech              = CMOS
 
| tech              = CMOS
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| socket            =  
 
| socket            =  
  
| succession      = Yes
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| succession      =  
 
| predecessor      =  
 
| predecessor      =  
 
| predecessor link =  
 
| predecessor link =  
| successor        = Langwell
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| successor        =  
| successor link  = intel/chipsets/langwell
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| successor link  =  
 
}}
 
}}
 
'''Poulsbo''' is a chipset for [[Intel]]'s first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture.
 
'''Poulsbo''' is a chipset for [[Intel]]'s first generation of {{intel|Atom}} processors based on the {{intel|Bonnell|l=arch}} microarchitecture.
 
==Overview ==
 
==Overview ==
[[File:Poulsbo lrg and sm.png|thumb|right|Comparison between the two Poulsbo packages.]]
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{{empty section}}
The Poulsbo chipset, part of the {{intel|Menlow|l=platform}}, offers the memory controller along with the much of the southbridge. Unlike all previous [[front-side bus]] signaling logic which used [[gunning transceiver logic|GTL]], to allow for more power saving, Poulsbo became the first chipset to support CMOS signaling as well. Such functionality was only offered by the {{intel|Silverthorne|l=core}}-based processors. In 2009 Intel released a second variant of Poulsbo in a larger [[package]].
 
 
 
== Features ==
 
* Intel {{intel|GMA 500}} GPU
 
** Licensed Imagination Technologies {{imgtec|PowerVR SGX 535}} graphics core + {{imgtec|PowerVR VXD370}} H.264/MPEG-4 AVC playback
 
{{expand section}}
 
  
  
 
{{clear}}
 
{{clear}}
 
 
== Die Shot ==
 
== Die Shot ==
 
* [[0.13 μm process]]
 
* [[0.13 μm process]]
* 22 mm x 22 mm package
 
 
[[File:poulsbo die.png|1200px]]
 
[[File:poulsbo die.png|1200px]]
 
 
[[File:poulsbo die (annotated).png|1200px]]
 
 
== Documents ==
 
* [[:File:poulsbo product brief.pdf|Intel Poulsbo product brief]]
 

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bus speed533 MHz (0.533 GHz, 533,000 kHz) +
bus typeFSB +
designerIntel + and Imagination Technologies +
first announcedApril 18, 2007 +
first launchedMarch 2, 2008 +
instance ofchipset +
manufacturerIntel +
namePoulsbo +
process130 nm (0.13 μm, 1.3e-4 mm) +
technologyCMOS + and GTL +