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From WikiChip
Difference between revisions of "intel/celeron/837"
| Line 13: | Line 13: | ||
|s-spec 3=SR0Q0 | |s-spec 3=SR0Q0 | ||
|market=Mobile | |market=Mobile | ||
| + | |market 2=131 mm² | ||
|family=Celeron | |family=Celeron | ||
|series=800 | |series=800 | ||
| Line 32: | Line 33: | ||
|core stepping=J1 | |core stepping=J1 | ||
|process=32 nm | |process=32 nm | ||
| + | |transistors=504,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
| + | |die area=131 mm² | ||
|word size=64 bit | |word size=64 bit | ||
|core count=2 | |core count=2 | ||
Revision as of 06:24, 19 August 2017
Cache
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