From WikiChip
Editing intel/celeron/3755u

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 1: Line 1:
 
{{intel title|Celeron 3755U}}
 
{{intel title|Celeron 3755U}}
−
{{chip
+
{{mpu
 
| name                = Celeron 3755U
 
| name                = Celeron 3755U
 
| no image            = Yes
 
| no image            = Yes
Line 32: Line 32:
 
| cpuid              =  
 
| cpuid              =  
  
−
| isa family          = x86
 
−
| isa                = x86-64
 
 
| microarch          = Broadwell
 
| microarch          = Broadwell
 
| platform            =  
 
| platform            =  
Line 53: Line 51:
 
| max memory          = 16 GiB
 
| max memory          = 16 GiB
  
−
 
+
| electrical          = Yes
 
| power              =  
 
| power              =  
 
| v core              =  
 
| v core              =  
Line 82: Line 80:
 
| socket 0            = BGA-1168
 
| socket 0            = BGA-1168
 
| socket 0 type      = BGA
 
| socket 0 type      = BGA
−
}}
 
−
'''Celeron 3755U''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2015]]. Operating at 1.7 GHz with a TDP of 15 W and a configurable TDP-down of of 10 W at 600 MHz, this {{intel|Broadwell|l=arch}}-based microprocessor is manufactured on Intel's [[14 nm process]].
 
−
 
−
== Cache ==
 
−
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
 
−
{{cache info
 
−
|l1i cache=64 KiB
 
−
|l1i break=4x32 KiB
 
−
|l1i desc=8-way set associative
 
−
|l1i extra=(per core, write-back)
 
−
|l1d cache=64 KiB
 
−
|l1d break=4x32 KiB
 
−
|l1d desc=8-way set associative
 
−
|l1d extra=(per core, write-back)
 
−
|l2 cache=512 KiB
 
−
|l2 break=2x256 KiB
 
−
|l2 desc=8-way set associative
 
−
|l2 extra=(per core, write-back)
 
−
|l3 cache=2 MiB
 
−
|l3 break=2x1 MiB
 
−
|l3 desc=12-way set associative
 
−
|l3 extra=(shared)
 
−
}}
 
−
 
−
== Memory controller ==
 
−
{{integrated memory controller
 
−
| type              = DDR3L-1333
 
−
| type 1            = DDR3L-1600
 
−
| type 2            = LPDDR3-1333
 
−
| type 3            = LPDDR3-1600
 
−
| controllers        = 1
 
−
| channels          = 2
 
−
| ecc support        = No
 
−
| max bandwidth      = 25,600 MB/s
 
−
| max memory        = 16 GiB
 
−
}}
 
−
 
−
== Graphics ==
 
−
{{integrated graphic
 
−
| gpu                = Intel HD Graphics (Broadwell)
 
−
| device id          =
 
−
| execution units    =
 
−
| displays            = 3
 
−
| frequency          = 100 MHz
 
−
| max frequency      = 800 MHz
 
−
| max memory          =
 
−
 
−
| output crt          =
 
−
| output sdvo        =
 
−
| output dsi          =
 
−
| output edp          =
 
−
| output dp          =
 
−
| output hdmi        =
 
−
| output vga          =
 
−
| output dvi          =
 
−
 
−
| directx ver        = 12
 
−
| opengl ver          =
 
−
| opencl ver          =
 
−
| opengl es ver      =
 
−
| hdmi ver            =
 
−
| dvi ver            =
 
−
| dsi ver            =
 
−
| vulkan ver          =
 
−
| dp ver              =
 
−
| edp ver            =
 
−
 
−
| max res hdmi        =
 
−
| max res hdmi freq  =
 
−
| max res dvi        =
 
−
| max res dvi freq    =
 
−
| max res dsi        =
 
−
| max res dsi freq    =
 
−
| max res dp          =
 
−
| max res dp freq    =
 
−
| max res edp        =
 
−
| max res edp freq    =
 
−
| max res vga        =
 
−
| max res vga freq    =
 
−
 
−
| intel quick sync  = Yes
 
−
| intel intru 3d    = Yes
 
−
| intel insider      =
 
−
| intel widi        =
 
−
| intel fdi          = Yes
 
−
| intel clear video  = Yes
 
−
}}
 
−
 
−
== Expansions ==
 
−
{{expansions
 
−
| pcie revision      = 2.0
 
−
| pcie lanes        = 12
 
−
| pcie config        = 4x1+2x4
 
−
}}
 
−
 
−
== Features ==
 
−
{{x86 features
 
−
| em64t      = Yes
 
−
| nx          = Yes
 
−
| txt        =
 
−
| tsx        =
 
−
| vpro        =
 
−
| ht          =
 
−
| tbt1        =
 
−
| tbt2        =
 
−
| tbmt3      =
 
−
| bpt        =
 
−
| vt-x        = Yes
 
−
| vt-d        = Yes
 
−
| ept        = Yes
 
−
| mmx        = Yes
 
−
| sse        = Yes
 
−
| sse2        = Yes
 
−
| sse3        = Yes
 
−
| ssse3      = Yes
 
−
| sse4.1      = Yes
 
−
| sse4.2      = Yes
 
−
| aes        =
 
−
| pclmul      =
 
−
| avx        =
 
−
| avx2        =
 
−
| bmi        =
 
−
| bmi1        =
 
−
| bmi2        =
 
−
| f16c        =
 
−
| fma3        =
 
−
| mpx        =
 
−
| sgx        =
 
−
| eist        = Yes
 
−
| secure key  = Yes
 
−
| os guard    = Yes
 
−
| intel at    =
 
−
| intel ipt  =
 
 
}}
 
}}

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)

Templates used on this page:

Retrieved from "https://en.wikichip.org/wiki/intel/celeron/3755u"
Facts about "Celeron 3755U - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron 3755U - Intel#io +
base frequency1,700 MHz (1.7 GHz, 1,700,000 kHz) +
bus rate5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus typeDMI 2.0 +
clock multiplier17 +
core count2 +
core nameBroadwell U +
designerIntel +
familyCeleron +
first announcedJanuary 5, 2015 +
first launchedJanuary 5, 2015 +
full page nameintel/celeron/3755u +
has extended page tables supporttrue +
has featureintegrated gpu +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
instance ofmicroprocessor +
integrated gpuIntel HD Graphics (Broadwell) +
integrated gpu base frequency100 MHz (0.1 GHz, 100,000 KHz) +
integrated gpu max frequency800 MHz (0.8 GHz, 800,000 KHz) +
isax86-64 +
isa familyx86 +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
last orderDecember 1, 2016 +
last shipmentDecember 30, 2016 +
ldateJanuary 5, 2015 +
manufacturerIntel +
market segmentMobile +
max case temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max cpu count1 +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max pcie lanes12 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureBroadwell +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number3755U +
nameCeleron 3755U +
part numberFH8065801620801 +
process14 nm (0.014 μm, 1.4e-5 mm) +
s-specSR211 +
series3000 +
smp max ways1 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
tdp down frequency600 MHz (0.6 GHz, 600,000 kHz) +
technologyCMOS +
thread count2 +
word size64 bit (8 octets, 16 nibbles) +