From WikiChip
Editing intel/celeron
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 219: | Line 219: | ||
Desktop {{intel|Kaby Lake|l=arch}}-based budget Celeron processors were introduced in early [[2017]]. Those models use standard {{intel|LGA-1151|Socket LGA-1151}}. While no major new features were introduced, those Kaby Lake Celeron models enjoy a modest performance increase due to their slightly higher clock frequency. Additionally, all models share the following common: | Desktop {{intel|Kaby Lake|l=arch}}-based budget Celeron processors were introduced in early [[2017]]. Those models use standard {{intel|LGA-1151|Socket LGA-1151}}. While no major new features were introduced, those Kaby Lake Celeron models enjoy a modest performance increase due to their slightly higher clock frequency. Additionally, all models share the following common: | ||
− | + | * '''TDP:''' 35 W, 51 W, and 54 W | |
− | |||
− | * '''TDP:''' 51 | ||
* '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | * '''ISA:''' Everything up to SSE4.2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES) | ||
− | * '''Tech:''' {{intel|VT-x}}, {{intel|VT-d}}, {{intel| | + | * '''Tech:''' {{intel|VT-x}}, {{intel|VT-d}}, {{intel|TSX}}, {{intel|SpeedStep}} (EIST), Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|Secure Key}}, and {{intel|Speed Shift}} |
− | * '''GPU:''' {{intel|HD Graphics 610}} @ 350 MHz with bursts of | + | * '''GPU:''' {{intel|HD Graphics 610}} @ 350 MHz with bursts of 1-1.05 GHz |
<!-- NOTE: | <!-- NOTE: | ||
Line 231: | Line 229: | ||
created and tagged accordingly. | created and tagged accordingly. | ||
− | Missing a chip? please dump its name here: | + | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips |
--> | --> | ||
{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc4 tc5"> |
− | + | <tr class="comptable-header"><th> </th><th colspan="12">List of Kaby Lake-based Celeron Desktop Processors</th></tr> | |
− | + | <tr class="comptable-header"><th> </th><th colspan="8">Main processor</th><th colspan="3">IGP</th></tr> | |
− | {{comp table header|cols | + | {{comp table header 1|cols=Price, Launched, Cores, Threads, L3$, Frequency, TDP, Max Mem, Name, Frequency, Turbo Frequency}} |
− | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop||Embedded]] | |
− | {{#ask: [[Category:microprocessor models by intel]] [[ | ||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
|?release price | |?release price | ||
|?first launched | |?first launched | ||
− | |||
− | |||
|?core count | |?core count | ||
|?thread count | |?thread count | ||
− | |? | + | |?l3$ size |
− | |? | + | |?base frequency#GHz |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
|?tdp | |?tdp | ||
− | |? | + | |?max memory#GiB |
− | |||
− | |||
|?integrated gpu | |?integrated gpu | ||
− | |?integrated gpu base frequency | + | |?integrated gpu base frequency#MHz |
− | |?integrated gpu max frequency | + | |?integrated gpu max frequency#GHz |
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=13 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[ | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Celeron]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} |
Facts about "Celeron - Intel"
designer | Intel + |
first announced | April 1998 + |
full page name | intel/celeron + |
instance of | microprocessor family + |
instruction set architecture | IA-32 + and x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | P6 +, NetBurst +, Core +, Penryn +, Nehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell +, Airmont +, Goldmont +, Skylake +, Coffee Lake + and Kaby Lake + |
name | Intel Celeron + |
package | FCBGA1170 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) +, 180 nm (0.18 μm, 1.8e-4 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | BGA1170 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |