Editing intel/atom/z560

{{intel title|Atom Z560}}
{{mpu
| name                = Atom Z560
| no image            = 
| image               = silverthorne.png
| image size          = 
| caption             = Silverthorne chip
| designer            = Intel
| manufacturer        = Intel
| model number        = Z560
| part number         = 
| part number 1       = 
| s-spec              = 
| s-spec 2            = 
| s-spec qs           = 
| market              = Mobile
| first announced     = June, 2010
| first launched      = June, 2010
| last order          = 
| last shipment       = 
| release price       = 

| family              = Atom
| series              = Z500
| locked              = Yes
| frequency           = 2,133.33 MHz
| bus type            = FSB
| bus speed           = 133.33 MHz
| bus rate            = 533.33 MT/s
| clock multiplier    = 16
| cpuid               = 106C2

| isa family          = x86
| isa                 = x86-32
| microarch           = Bonnell
| platform            = Menlow
| chipset             = Poulsbo
| core name           = Silverthorne
| core family         = 6
| core model          = 28
| core stepping       = C0
| process             = 45 nm
| transistors         = 47,212,207
| technology          = CMOS
| die area            = 24.18 mm²
| die width           = 3.1 mm
| die length          = 7.8 mm
| word size           = 32 bit
| core count          = 1
| thread count        = 2
| max cpus            = 1

| electrical          = Yes
| power               = 
| average power       = 220 mW
| idle power          = 100 mW
| v core min          = 0.75 V
| v core max          = 1.1 V
| sdp                 = 
| tdp                 = 2.5 W
| tjunc min           = 0 °C
| tjunc max           = 90 °C
| tcase min           = 0 °C
| tcase max           = 70 °C
| tstorage min        = -40 °C
| tstorage max        = 85 °C

| package module 1    = {{packages/intel/fcbga-441}}
}}
'''Z560''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in mid-2010 specifically for Mobile Internet Devices (MID). The Z560, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 2.133 GHz with a TDP of 2.5 W. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets).
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 {{intel title|Atom Z560}}
-{{chip
+{{mpu
 | name                = Atom Z560
 | no image            =
@@ Line 10: / Line 10: @@
 | model number        = Z560
 | part number         =
-| part number 2       =
+| part number 1       =
 | s-spec              =
 | s-spec 2            =
@@ Line 51: / Line 51: @@
 | max cpus            = 1
+| electrical          = Yes
 | power               =
 | average power       = 220 mW
@@ Line 69: / Line 69: @@
 }}
 '''Z560''' is an ultra-low power {{arch|32}} [[x86]] microprocessor introduced by [[Intel]] in mid-2010 specifically for Mobile Internet Devices (MID). The Z560, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Silverthorne|l=core}} core), is manufactured on a [[45 nm process]]. This processor operates at 2.133 GHz with a TDP of 2.5 W. The MPU features a legacy 533 MT/s [[front-side bus]] capable of communicating with the {{intel|Poulsbo|l=chipset}} chipset in both low-power [[CMOS]] mode as well as normal [[GTL]] mode (which also works with other chipsets).
-This processor has a TDP of 2.5 W when {{intel|Hyper-Threading}} is disabled and 2.75 W when enabled.
-== Cache ==
-{{main|intel/microarchitectures/bonnell#Memory_Hierarchy|l1=Bonnell § Cache}}
-{{cache size
-|l1 cache=56 KiB
-|l1i cache=32 KiB
-|l1i break=1x32 KiB
-|l1i desc=8-way set associative
-|l1d cache=24 KiB
-|l1d break=1x24 KiB
-|l1d desc=6-way set associative
-|l1d policy=write-back
-|l2 cache=512 KiB
-|l2 break=1x512 KiB
-|l2 desc=8-way set associative
-}}
-== Memory controller ==
-This processor has no integrated memory controller.
-== Graphics ==
-This processor has no integrated graphics.
-== Features ==
-{{x86 features
-|real=Yes
-|protected=Yes
-|smm=Yes
-|fpu=Yes
-|x8616=Yes
-|x8632=Yes
-|x8664=No
-|nx=Yes
-|mmx=Yes
-|emmx=Yes
-|sse=Yes
-|sse2=Yes
-|sse3=Yes
-|ssse3=Yes
-|sse41=No
-|sse42=No
-|sse4a=No
-|avx=No
-|avx2=No
-|abm=No
-|tbm=No
-|bmi1=No
-|bmi2=No
-|fma3=No
-|fma4=No
-|aes=No
-|rdrand=No
-|sha=No
-|xop=No
-|adx=No
-|clmul=No
-|f16c=No
-|tbt1=No
-|tbt2=No
-|tbmt3=No
-|bpt=No
-|eist=Yes
-|sst=No
-|flex=No
-|fastmem=No
-|isrt=No
-|sba=No
-|mwt=No
-|sipp=No
-|att=No
-|ipt=No
-|tsx=No
-|txt=No
-|ht=Yes
-|vpro=No
-|vtx=Yes
-|vtd=No
-|ept=No
-|mpx=No
-|sgx=No
-|securekey=No
-|osguard=No
-|3dnow=No
-|e3dnow=No
-|smartmp=No
-|powernow=No
-|amdvi=No
-|amdv=No
-|rvi=No
-|smt=No
-|sensemi=No
-|xfr=No
-}}
-== Die Shot ==
-{{see also|intel/microarchitectures/bonnell#Silverthorne|l1=Bonnell § Silverthorne Die}}
-* [[45 nm process]]
-* 9 metal layers
-* 47,212,207 transistors
-* 3.1 mm x 7.8 mm
-* 24.18 mm² die size
-[[File:Silverthorne die shot.jpg|650px]]
-[[File:Silverthorne die shot (marked).png|650px]]
-== Documents ==
-=== Datasheet ===
-* [[:File:atom z5xx.pdf|Intel Atom Processor Z5xx Series Datasheet]], June 2010
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Atom Z560 - Intel#package +
base frequency	2,133.33 MHz (2.133 GHz, 2,133,330 kHz) +
bus rate	533.33 MT/s (0.533 GT/s, 533,330 kT/s) +
bus speed	133.33 MHz (0.133 GHz, 133,330 kHz) +
bus type	FSB +
chipset	Poulsbo +
clock multiplier	16 +
core count	1 +
core family	6 +
core model	28 +
core name	Silverthorne +
core stepping	C0 +
core voltage (max)	1.1 V (11 dV, 110 cV, 1,100 mV) +
core voltage (min)	0.75 V (7.5 dV, 75 cV, 750 mV) +
cpuid	106C2 +
designer	Intel +
die area	24.18 mm² (0.0375 in², 0.242 cm², 24,180,000 µm²) +
die length	7.8 mm (0.78 cm, 0.307 in, 7,800 µm) +
die width	3.1 mm (0.31 cm, 0.122 in, 3,100 µm) +
family	Atom +
first announced	June 2010 +
first launched	June 2010 +
full page name	intel/atom/z560 +
has feature	Hyper-Threading Technology +, Intel VT-x + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has simultaneous multithreading	true +
instance of	microprocessor +
isa	x86-32 +
isa family	x86 +
l1$ size	56 KiB (57,344 B, 0.0547 MiB) +
l1d$ description	6-way set associative +
l1d$ size	24 KiB (24,576 B, 0.0234 MiB) +
l1i$ description	8-way set associative +
l1i$ size	32 KiB (32,768 B, 0.0313 MiB) +
l2$ description	8-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate	June 2010 +
main image	+
main image caption	Silverthorne chip +
manufacturer	Intel +
market segment	Mobile +
max case temperature	343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count	1 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max storage temperature	358.15 K (85 °C, 185 °F, 644.67 °R) +
microarchitecture	Bonnell +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Z560 +
name	Atom Z560 +
package	FCBGA-441 +
platform	Menlow +
power dissipation (average)	0.22 W (220 mW, 2.9502e-4 hp, 2.2e-4 kW) +
power dissipation (idle)	0.1 W (100 mW, 1.341e-4 hp, 1.0e-4 kW) +
process	45 nm (0.045 μm, 4.5e-5 mm) +
series	Z500 +
smp max ways	1 +
socket	BGA-441 +
tdp	2.5 W (2,500 mW, 0.00335 hp, 0.0025 kW) +
technology	CMOS +
thread count	2 +
transistor count	47,212,207 +
word size	32 bit (4 octets, 8 nibbles) +