| image            = broadwell de (front).png

| image size        = 250px

| type              = System in packages

| package          = fcBGA-1667

| socket            = BGA-1667

[[File:broadwell de (back).png|225px|right]]

'''Xeon D''' is a family of {{arch|64}} multi-core [[x86]] [[microserver]] single-chip processors introduced by [[Intel]] in March of 2015. Xeon D chips are aimed at filling the gap between the {{intel|Atom}} and the {{intel|Xeon E3}} families. Targeting the low-end server market, the Xeon D family puts priority on efficiency and networking - areas where dense, lower-power, lightweight [[hyperscale]] workloads are expected.

The Xeon D began as a joint collaboration between [[Facebook]] and [[Intel]] in 2013. Yosemite is the codename for Facebook's open source modular chassis for the highly-concurrent but lower-power microservers. The design calls for dense nodes of lower power but highly concurrent workload which tends to be mostly memory-bandwidth-bound. While early designs where mostly based on the {{intel|Atom}} SoCs, their performance proved to be too much of a bottleneck on its own. Xeon D is a middle-tier family that's a step above {{intel|Atom}} in terms of performance, but below {{intel|Xeon E3}} power-wise. Xeon D is largely driven by high concurrency and better memory capabilities.

Currently, Intel offers two series of Xeon D parts - dense low-power and dense high-power parts.

 

| D-1500 || March, [[2015]] || {{intel|Broadwell DE|l=core}} || {{intel|Broadwell|l=arch}}

 

[[File:Intel-Xeon-processor-D-1500.png|right|300px]]

First-generation of dense low-power Xeon D parts were introduced in early [[2015]] and are based on the {{intel|Broadwell (server)|Broadwell|l=arch}} microarchitecture. Fabricated on their [[14 nm process]], those parts incorporate up to [[16 cores|sixteen cores]] with a [[TDP]] of up to 65 W.

 

* '''ISA:''' Everything up to {{x86|AVX2}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}})

 

All models are a single-chip solution, meaning both the [[CPU]] [[die]] and the [[chipset]] die are packaged together on the same substrate.

 

|?has integrated intel quickassist technology

</table>

 

 

{{main|intel/cores/hewitt lake|l1=Hewitt Lake core}}

Intel introduced a refresh of the {{intel|Broadwell DE|l=core}} in early 2019, formerly codename {{intel|Hewitt Lake|l=core}}. Like the prior generation, those new processors are also based on the {{intel|Broadwell (server)|Broadwell|l=arch}} microarchitecture. Fabricated on their [[14 nm process]], those parts incorporate up to [[16 cores|sixteen cores]] with a [[TDP]] of up to 65 W. The new SKUs feature higher frequencies at similar TDPs, improving the performance per watt.

 

 

 

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{{comp table count|ask=[[Category:microprocessor models by intel]] [[core name::Hewitt Lake]]}}

 

== Dense High-Power ==

=== D-2100 Series (Skylake) ===

{{main|intel/microarchitectures/skylake (server)|intel/cores/skylake de|l1=Skylake (server) Microarchitecture|l2=Skylake DE core}}

Introduced in February [[2018]], Xeon D-2100 series processors are based on the {{intel|Skylake (server)|Skylake microarchitecture|l=arch}}. Those low-power variant range from [[4 cores|4]] to [[18 cores]] with {{intel|hyperthreading}} support. As with the previous generations, those chips are also a single-chip solution - the {{intel|Lewisburg|l=chipset}} [[chipset]] is incorporated into the same package as the processor. Being based on the new {{intel|Skylake (server)|Skylake microarchitecture|l=arch}} means those parts are also based on the mesh architecture which brought a much bigger L2 cache and supports twice as many memory channels. Additionally, all models also support {{x86|AVX-512}} with a single execution unit.

 

 

 

All models have all the following features in common:

 

* '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}/{{intel|EPT}}, {{intel|VT-d}}, {{intel|TBT 2.0}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|SpeedStep}}, {{intel|Secure Key}}, {{intel|MPX}}, {{intel|OS Guard}}, and {{intel|RAS}}.

           Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips

<table class="comptable sortable tc4 tc5 tc12">

{{comp table header|main|11:List of Skylake DE-based Processors}}

{{comp table header|cols|Launched|Price|Cores|Threads|TDP|L2|L3|%Frequency|%Turbo|Memory|QAT}}

{{#ask: [[Category:microprocessor models by intel]] [[core name::Skylake DE]] [[part of::Edge Server and Cloud SKUs]]

  |?l2$ size

|?base frequency#GHz

  |template=proc table 3

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{{comp table header|lsep|11:Integrated QuickAssist Technology SKUs}}

{{#ask: [[Category:microprocessor models by intel]] [[core name::Skylake DE]] [[part of::Integrated QuickAssist Technology SKUs]]

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{{comp table count|ask=[[Category:microprocessor models by intel]] [[core name::Skylake DE]]}}