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Latest revision Your text
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|core count=16
 
|core count=16
 
|thread count=16
 
|thread count=16
|max cpus=2
+
|max cpus=1
|max memory=128 GiB
+
|max memory=256 GiB
 
}}
 
}}
'''Hi1610''' is a [[hexadeca-core]] {{arch|64}} [[ARM]] server microprocessor introduced by HiSilicon in late 2015. Fabricated by [[TSMC]] on a [[16 nm process]], this chip incorporates 16 {{armh|Cortex-A57}} cores operating at 2.1 GHz. The Hi1610 supports up to 128 GiB of dual-channel DDR4-1866 memory.
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'''Hi1610''' is a [[hexadeca-core]] {{arch|64}} [[ARM]] server microprocessor introduced by HiSilicon in late-2015. Fabricated by [[TSMC]] on a [[16 nm process]], this chip incorporates 16 {{armh|Cortex-A57}} cores operating at 2.1 GHz. The Hi1610 supports up to 256 GiB of quad-channel DDR4-1866 memory.
  
 
== Cache ==
 
== Cache ==
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{{cache size
 
{{cache size
 
|l1 cache=1.25 MiB
 
|l1 cache=1.25 MiB
|l1i cache=768 KiB
+
|l1i cache=768 MiB
 
|l1i break=16x48 KiB
 
|l1i break=16x48 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
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|max mem=256 GiB
 
|max mem=256 GiB
 
|controllers=1
 
|controllers=1
|channels=2
+
|channels=4
 
|width=64 bit
 
|width=64 bit
 
|max bandwidth=55.63 GiB/s
 
|max bandwidth=55.63 GiB/s
 
|bandwidth schan=13.91 GiB/s
 
|bandwidth schan=13.91 GiB/s
 
|bandwidth dchan=27.81 GiB/s
 
|bandwidth dchan=27.81 GiB/s
 +
|bandwidth qchan=55.63 GiB/s
 
}}
 
}}
  
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}}
 
}}
 
}}
 
}}
== Features ==
 
{{arm features
 
|thumb=No
 
|thumb2=No
 
|thumbee=No
 
|vfpv1=No
 
|vfpv2=No
 
|vfpv3=No
 
|vfpv3-d16=No
 
|vfpv3-f16=No
 
|vfpv4=No
 
|vfpv4-d16=No
 
|vfpv5=No
 
|neon=Yes
 
|trustzone=No
 
|jazelle=No
 
|wmmx=No
 
|wmmx2=No
 
|pmuv3=No
 
|crc32=Yes
 
|crypto=No
 
|fp=No
 
|fp16=No
 
|profile=No
 
|ras=No
 
|simd=No
 
|rdm=No
 
}}
 
== Utilizing devices ==
 
* [[used by::HiSilicon D02]]
 
 
{{expand list}}
 

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Facts about "Hi1610 - HiSilicon"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Hi1610 - HiSilicon#pcie +
base frequency2,100 MHz (2.1 GHz, 2,100,000 kHz) +
core count16 +
core nameCortex-A57 +
designerHiSilicon + and ARM Holdings +
familyHi16xx +
first announced2015 +
first launched2015 +
full page namehisilicon/kunpeng/hi1610 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8 +
isa familyARM +
l1$ size1,280 KiB (1,310,720 B, 1.25 MiB) +
l1d$ description8-way set associative +
l1d$ size512 KiB (524,288 B, 0.5 MiB) +
l1i$ description8-way set associative +
l1i$ size768 KiB (786,432 B, 0.75 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description16-way set associative +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldate2015 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth55.63 GiB/s (56,965.12 MiB/s, 59.732 GB/s, 59,732.258 MB/s, 0.0543 TiB/s, 0.0597 TB/s) +
max memory channels2 +
microarchitectureCortex-A57 +
model numberHi1610 +
nameHi1610 +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways2 +
supported memory typeDDR4-1866 +
technologyCMOS +
thread count16 +
used byHiSilicon D02 +
word size64 bit (8 octets, 16 nibbles) +