Semiconductor & Computer Engineering
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Introduced at the 2017 IFA, the overall core organization is identical to the {{\\|960|Kirin 960}} which was introduced the previous year, but features 20% power efficiency and 40% smaller [[die area]] due to the [[process shrink]]. The 970 adds many enhancements, including a more powerful {{armh|Mali G72}} GPU and incorporates a new Neural Network Processing Unit (NPU) designed for [[AI]] acceleration. The 970 has two improved [[image signal processor|ISP]]s and a more powerful LTE modem supporting up to [[User Equipment]] (UE) category 18 capable of reaching a maximum downlink of 1.2 Gbps (4x4 MIMO, 256 QAM, 3CC CA). | Introduced at the 2017 IFA, the overall core organization is identical to the {{\\|960|Kirin 960}} which was introduced the previous year, but features 20% power efficiency and 40% smaller [[die area]] due to the [[process shrink]]. The 970 adds many enhancements, including a more powerful {{armh|Mali G72}} GPU and incorporates a new Neural Network Processing Unit (NPU) designed for [[AI]] acceleration. The 970 has two improved [[image signal processor|ISP]]s and a more powerful LTE modem supporting up to [[User Equipment]] (UE) category 18 capable of reaching a maximum downlink of 1.2 Gbps (4x4 MIMO, 256 QAM, 3CC CA). | ||
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| + | == Cache == | ||
| + | {{main|arm holdings/microarchitectures/cortex-a53#Memory_Hierarchy|arm holdings/microarchitectures/cortex-a73#Memory_Hierarchy|l1=Cortex-A53 § Cache|l2=Cortex-A73 § Cache}} | ||
| + | {{cache size}} | ||
Revision as of 10:02, 7 September 2017
Template:mpu Kirin 970 is a 64-bit octa-core high-performance mobile ARM LTE SoC introduced by HiSilicon in mid-2017 at the 2017 IFA. This chip, which is fabricated on a 10 nm process, features four Cortex-A73 big cores operating at up to 2.4 GHz along with four Cortex-A53 little cores operating at up to 1.8 GHz. The 970 incorporates ARM's Mali G72 (12 core) IGP operating at ? MHz and supports up to 6 GiB of dual-channel LPDDR4-1866 memory.
Introduced at the 2017 IFA, the overall core organization is identical to the Kirin 960 which was introduced the previous year, but features 20% power efficiency and 40% smaller die area due to the process shrink. The 970 adds many enhancements, including a more powerful Mali G72 GPU and incorporates a new Neural Network Processing Unit (NPU) designed for AI acceleration. The 970 has two improved ISPs and a more powerful LTE modem supporting up to User Equipment (UE) category 18 capable of reaching a maximum downlink of 1.2 Gbps (4x4 MIMO, 256 QAM, 3CC CA).
Cache
- Main articles: Cortex-A53 § Cache and Cortex-A73 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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