Semiconductor & Computer Engineering
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The clock cycle is a fundamental part of all [[synchronous circuits]] which must accommodate the time taken for the longest [[critical path]] for all possible states in a circuit. In other words, it's usually the sum of all the wire and switching delay for the longest indivisible portion of the circuit. The clock cycle is usually a constant value, although various [[power management mechanisms]] can modulate it to achieve better performance and efficiency attributes. | The clock cycle is a fundamental part of all [[synchronous circuits]] which must accommodate the time taken for the longest [[critical path]] for all possible states in a circuit. In other words, it's usually the sum of all the wire and switching delay for the longest indivisible portion of the circuit. The clock cycle is usually a constant value, although various [[power management mechanisms]] can modulate it to achieve better performance and efficiency attributes. | ||
| − | + | == See also == | |
| + | * [[clock speed]] | ||
| + | * [[synchronous circuits]] | ||
| + | * [[critical path]] | ||
| + | * [[performance]] | ||
{{stub}} | {{stub}} | ||
Revision as of 15:51, 4 January 2019
Clock Cycle (also known as clock period, clock tick, or simply a tick or a cycle) is the minimum time unit required to perform all the most basic operations in a synchronous circuit such as a value transfer between two buffers. The length of a single clock cycle is the time required for one complete clock pulse. It is the reciprocal of the clock speed.
Overview
The clock cycle is a fundamental part of all synchronous circuits which must accommodate the time taken for the longest critical path for all possible states in a circuit. In other words, it's usually the sum of all the wire and switching delay for the longest indivisible portion of the circuit. The clock cycle is usually a constant value, although various power management mechanisms can modulate it to achieve better performance and efficiency attributes.
See also
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