From WikiChip
Information for "cavium/octeon plus/cn5830-800bg1521-exp"

Basic information

Display titleCN5830-800 EXP - Cavium
Default sort keyCN5830-800 EXP, Cavium
Page length (in bytes)3,650
Page ID12252
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page6
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

Page protection

EditAllow all users (infinite)
MoveAllow all users (infinite)

Edit history

Page creatorChipIt (talk | contribs)
Date of page creation23:08, 14 December 2016
Latest editorChippyBot (talk | contribs)
Date of latest edit15:12, 13 December 2017
Total number of edits11
Total number of distinct authors2
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

Page properties

Transcluded templates (16)

Templates used on this page:

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
CN5830-800 EXP - Cavium#package +
base frequency800 MHz (0.8 GHz, 800,000 kHz) +
core count4 +
designerCavium +
familyOCTEON Plus +
first announcedOctober 9, 2006 +
first launchedFebruary 2007 +
full page namecavium/octeon plus/cn5830-800bg1521-exp +
has ecc memory supporttrue +
has hardware accelerators for data compressiontrue +
has hardware accelerators for data decompressiontrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for regular expressiontrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size0.188 MiB (192 KiB, 196,608 B, 1.831055e-4 GiB) +
l1d$ description64-way set associative +
l1d$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l1i$ description64-way set associative +
l1i$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateFebruary 2007 +
main imageFile:octeon plus chip.png +
manufacturerTSMC +
market segmentNetwork +
max cpu count1 +
max memory bandwidth11.92 GiB/s (20.741 GB/s, 12,206.08 MiB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels1 +
microarchitecturecnMIPS +
model numberCN5830-800 EXP +
nameCavium CN5830-800 EXP +
packageFCBGA-1521 +
part numberCN5830-800BG1521-EXP +
process90 nm (0.09 μm, 9.0e-5 mm) +
seriesCN58xx +
smp max ways1 +
supported memory typeDDR2-800 +
technologyCMOS +
thread count4 +
word size64 bit (8 octets, 16 nibbles) +