From WikiChip
Information for "cavium/octeon plus"

Basic information

Display titleOCTEON Plus - Cavium
Default sort keyOCTEON Plus, Cavium
Page length (in bytes)6,178
Page ID12189
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page4
Counted as a content pageYes
Number of subpages of this page80 (0 redirects; 80 non-redirects)

Page protection

EditAllow all users (infinite)
MoveAllow all users (infinite)

Edit history

Page creatorChipIt (talk | contribs)
Date of page creation02:26, 11 December 2016
Latest editorChipIt (talk | contribs)
Date of latest edit14:41, 29 December 2016
Total number of edits15
Total number of distinct authors1
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

Page properties

Hidden category (1)

This page is a member of 1 hidden category:

Transcluded templates (15)

Templates used on this page:

Facts about "OCTEON Plus - Cavium"
designerCavium +
first announcedOctober 9, 2006 +
first launchedFebruary 2007 +
full page namecavium/octeon plus +
instance ofsystem on a chip family +
instruction set architectureMIPS64 +
main designerCavium +
manufacturerTSMC +
microarchitecturecnMIPS +
nameCavium OCTEON Plus +
packageFCBGA-1521 +
process90 nm (0.09 μm, 9.0e-5 mm) +
socketBGA-1521 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +