Semiconductor & Computer Engineering
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Information for "cavium/octeon/cn3630-400bg1521-scp"
Basic information
| Display title | CN3630-400 SCP - Cavium |
| Default sort key | CN3630-400 SCP, Cavium |
| Page length (in bytes) | 3,780 |
| Page ID | 12088 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 6 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | ChipIt (talk | contribs) |
| Date of page creation | 03:44, 10 December 2016 |
| Latest editor | ChippyBot (talk | contribs) |
| Date of latest edit | 16:11, 13 December 2017 |
| Total number of edits | 9 |
| Total number of distinct authors | 2 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (16) | Templates used on this page:
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Facts about "CN3630-400 SCP - Cavium"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | CN3630-400 SCP - Cavium#package + |
| base frequency | 400 MHz (0.4 GHz, 400,000 kHz) + |
| core count | 4 + |
| core name | cnMIPS + |
| designer | Cavium + |
| family | OCTEON + |
| first announced | August 2005 + |
| first launched | August 2005 + |
| full page name | cavium/octeon/cn3630-400bg1521-scp + |
| has ecc memory support | true + |
| has hardware accelerators for cryptography | true + |
| has hardware accelerators for network quality of service processing | true + |
| has hardware accelerators for tcp packet processing | true + |
| instance of | microprocessor + |
| isa | MIPS64 + |
| isa family | MIPS + |
| l1$ size | 160 KiB (163,840 B, 0.156 MiB) + |
| l1d$ description | 64-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 64-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| ldate | August 2005 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Networking + |
| max cpu count | 1 + |
| max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
| max memory bandwidth | 5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | cnMIPS + |
| model number | CN3630-400 SCP + |
| name | Cavium CN3630-400 SCP + |
| package | FCBGA-1521 + |
| part number | CN3630-400BG1521-SCP + |
| power dissipation | 14 W (14,000 mW, 0.0188 hp, 0.014 kW) + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + |
| series | CN3600 + |
| smp max ways | 1 + |
| supported memory type | DDR2-800 + |
| technology | CMOS + |
| thread count | 4 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
