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Editing cavium/octeon/cn3110-400bg868-exp (section)

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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
CN3110-400 EXP - Cavium#package +
base frequency400 MHz (0.4 GHz, 400,000 kHz) +
core count1 +
core namecnMIPS +
designerCavium +
familyOCTEON +
first announcedJanuary 30, 2006 +
first launchedMay 1, 2006 +
full page namecavium/octeon/cn3110-400bg868-exp +
has ecc memory supporttrue +
has hardware accelerators for data compressiontrue +
has hardware accelerators for data decompressiontrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for regular expressiontrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size0.0391 MiB (40 KiB, 40,960 B, 3.814697e-5 GiB) +
l1d$ description64-way set associative +
l1d$ size0.00781 MiB (8 KiB, 8,192 B, 7.629395e-6 GiB) +
l1i$ description4-way set associative +
l1i$ size0.0313 MiB (32 KiB, 32,768 B, 3.051758e-5 GiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateMay 1, 2006 +
main imageFile:octeon cn31xx.png +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory channels1 +
microarchitecturecnMIPS +
model numberCN3110-400 EXP +
nameCavium CN3110-400 EXP +
packageHSBGA-868 +
part numberCN3110-400BG868-EXP +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesCN3100 +
supported memory typeDDR2-667 +
technologyCMOS +
thread count1 +
word size64 bit (8 octets, 16 nibbles) +