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In [[2013]], Broadcom announced that they have licensed the ARMv7 and ARMv8 ISAs, allowing them to develop their own micro-architectures based on the ISA. Vulcan is the outcome of this effort which involved adapting the existing core to the [[ARM]] ISA instead of [[MIPS]] and enhancing the cores in various ways. Vulcan development started in early [[2012]] and was expected to enter mass production in mid-[[2015]]. | In [[2013]], Broadcom announced that they have licensed the ARMv7 and ARMv8 ISAs, allowing them to develop their own micro-architectures based on the ISA. Vulcan is the outcome of this effort which involved adapting the existing core to the [[ARM]] ISA instead of [[MIPS]] and enhancing the cores in various ways. Vulcan development started in early [[2012]] and was expected to enter mass production in mid-[[2015]]. | ||
− | In [[2016]] [[Cavium]] acquired Vulcan from | + | In [[2016]] [[Cavium]] acquired Vulcan from broadcom which was introduced the following year. In early [[2018]], Vulcan-based microprocessor entered general availability under the {{cavium|ThunderX2}} brand. |
== Brands == | == Brands == | ||
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| [[File:ThunderX2_logo.png|100px|link=cavium/thunderx2]] || {{cavium|ThunderX2}} || {{tchk|yes|2-way}} || {{tchk|yes|4-way}} || 16-32 | | [[File:ThunderX2_logo.png|100px|link=cavium/thunderx2]] || {{cavium|ThunderX2}} || {{tchk|yes|2-way}} || {{tchk|yes|4-way}} || 16-32 | ||
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Facts about "Vulcan - Microarchitectures - Cavium"
codename | Vulcan + |
core count | 16 +, 20 +, 24 +, 28 +, 30 + and 32 + |
designer | Cavium + and Broadcom + |
first launched | 2018 + |
full page name | cavium/microarchitectures/vulcan + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.1 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Vulcan + |
pipeline stages (max) | 15 + |
pipeline stages (min) | 13 + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |