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|manufacturer 2=Samsung | |manufacturer 2=Samsung | ||
|manufacturer 3=GlobalFoundries | |manufacturer 3=GlobalFoundries | ||
| − | | | + | |manufacturer 4=SMIC |
|introduction=October 30, 2012 | |introduction=October 30, 2012 | ||
| − | |process= | + | |process=28 nm |
| − | |process 2= | + | |process 2=20 nm |
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| − | |process 4= | + | |process 4=14 nm |
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|core names=<!-- Yes if specify --> | |core names=<!-- Yes if specify --> | ||
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}} | }} | ||
'''Cortex-A53''' (formerly '''Apollo''') is an ultra-high efficiency [[microarchitecture]] designed by [[ARM Holdings]] as a successor to the {{armh|Cortex-A7|l=arch}}. The Cortex-A53, which implemented the {{arm|ARMv8}} ISA, is typically found in entry-level smartphone and other embedded devices. Often A53 cores are combined with higher performance processors (e.g. based on {{armh|Cortex-A57|l=arch}} or {{armh|Cortex-A72|l=arch}}) in {{armh|big.LITTLE}} configuration to achieve better energy/performance. | '''Cortex-A53''' (formerly '''Apollo''') is an ultra-high efficiency [[microarchitecture]] designed by [[ARM Holdings]] as a successor to the {{armh|Cortex-A7|l=arch}}. The Cortex-A53, which implemented the {{arm|ARMv8}} ISA, is typically found in entry-level smartphone and other embedded devices. Often A53 cores are combined with higher performance processors (e.g. based on {{armh|Cortex-A57|l=arch}} or {{armh|Cortex-A72|l=arch}}) in {{armh|big.LITTLE}} configuration to achieve better energy/performance. | ||
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| − | Note that for big.LITTLE | + | Note that for big.LITTLE system it's possible specify more specific performance tunes: |
* <code>-mtune=cortex-a57.cortex-a53</code> | * <code>-mtune=cortex-a57.cortex-a53</code> | ||
* <code>-mtune=cortex-a72.cortex-a53</code> | * <code>-mtune=cortex-a72.cortex-a53</code> | ||
* <code>-mtune=cortex-a73.cortex-a53</code> | * <code>-mtune=cortex-a73.cortex-a53</code> | ||
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== Architecture == | == Architecture == | ||
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== Die == | == Die == | ||
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== All Cortex-A53 Chips == | == All Cortex-A53 Chips == | ||
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</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
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Facts about "Cortex-A53 - Microarchitectures - ARM"
| codename | Cortex-A53 + |
| core count | 1 +, 2 +, 3 + and 4 + |
| designer | ARM Holdings + |
| first launched | October 30, 2012 + |
| full page name | arm holdings/microarchitectures/cortex-a53 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| manufacturer | TSMC +, Samsung + and GlobalFoundries + |
| microarchitecture type | CPU + |
| name | Cortex-A53 + |
| pipeline stages | 8 + |
| process | 40 nm (0.04 μm, 4.0e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) +, 20 nm (0.02 μm, 2.0e-5 mm) +, 16 nm (0.016 μm, 1.6e-5 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) + |
