Semiconductor & Computer Engineering
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== Members == | == Members == | ||
=== N-Series === | === N-Series === | ||
| − | {{ | + | The Ethos-N series was introduced in October 2019. These are mainstream mobile and IoT NPUs designed to scale from 1-4 [[TOPS]] and from 250 mW up to 1.5 W. Multiple instances of those IPs may be combined using Arm's {{armh|CCN-500}} or {{armh|CMN-600}} interconnects to scale to higher performance. |
| + | |||
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| + | {| class="wikitable" style="text-align: center;" | ||
| + | |- | ||
| + | ! colspan="2" | General || colspan="2" | Configuration || colspan="2" | SRAM || colspan="4" | Compute | ||
| + | |- | ||
| + | ! NPU !! Introduction !! Quads !! {{armh|MLP#Compute Engine (CE)|CEs|l=arch}} || Bank || Total || MACs || OPS/clk || [[Int8]] || [[Int16]] | ||
| + | |- | ||
| + | | {{armh|Ethos-N37|l=core}} || Oct 23, 2019 || 1 || 4 || 128 KiB || 512 KiB || 512 MACs || 1024 OPs/clk || 1.024 TOPS || 256 GOPS | ||
| + | |- | ||
| + | | {{armh|Ethos-N57|l=core}} || Oct 23, 2019 || 2 || 8 || 64 KiB || 512 KiB || 1024 MACs || 2048 OPs/clk || 2.048 TOPS || 512 GOPS | ||
| + | |- | ||
| + | | {{armh|Ethos-N77|l=core}} || Oct 23, 2019 || 4 || 16 || 64 KiB<br>256 KiB || 1 MiB<br>4 MiB || 2048 MACs || 4096 OPs/clk || 4.096 TOPS || 1.024 TOPS | ||
| + | |} | ||
== See also == | == See also == | ||
* Intel Habana {{habana|HL|HL Series}} | * Intel Habana {{habana|HL|HL Series}} | ||
Revision as of 23:31, 6 February 2020
Ethos is a family of synthesizable neural processor IPs designed by Arm for IoT and edge applications.
Contents
Overview
First introduced in late 2019, Ethos is a family of synthesizable neural processor IPs designed by Arm for various markets. The Ethos family represents the series of NPUs as part of Project Trillium. The underlying microarchitecture for all the Ethos NPUs is the MLP which is designed to be scalable through various configurations based on the SRAM sizes and the number of compute engines.
Members
N-Series
The Ethos-N series was introduced in October 2019. These are mainstream mobile and IoT NPUs designed to scale from 1-4 TOPS and from 250 mW up to 1.5 W. Multiple instances of those IPs may be combined using Arm's CCN-500 or CMN-600 interconnects to scale to higher performance.
| General | Configuration | SRAM | Compute | ||||||
|---|---|---|---|---|---|---|---|---|---|
| NPU | Introduction | Quads | CEs | Bank | Total | MACs | OPS/clk | Int8 | Int16 |
| Ethos-N37 | Oct 23, 2019 | 1 | 4 | 128 KiB | 512 KiB | 512 MACs | 1024 OPs/clk | 1.024 TOPS | 256 GOPS |
| Ethos-N57 | Oct 23, 2019 | 2 | 8 | 64 KiB | 512 KiB | 1024 MACs | 2048 OPs/clk | 2.048 TOPS | 512 GOPS |
| Ethos-N77 | Oct 23, 2019 | 4 | 16 | 64 KiB 256 KiB |
1 MiB 4 MiB |
2048 MACs | 4096 OPs/clk | 4.096 TOPS | 1.024 TOPS |
See also
- Intel Habana HL Series
