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|successor link=ampere computing/microarchitectures/quicksilver
 
|successor link=ampere computing/microarchitectures/quicksilver
 
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'''Skylark''' is [[AppliedMicro]]'s successor to {{\\|Shadowcat}}, a [[16 nm]] [[ARM]] microarchitecture for servers. This microarcitecture was eventually acquired by [[Ampere Computing]] which has brought it to market under the {{ampere|eMAG}} brand.
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'''Skylark''' is [[AppliedMicro]]'s successor to {{\\|Shadowcat}}, a [[16 nm]] [[ARM]] microarchitecture for servers. This microarcitecture was eventually acquired by [[Ampere Computing]] which has brought it to market.
  
 
== Release Date ==
 
== Release Date ==
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=== Key changes from {{\\|Shadowcat}} ===
 
=== Key changes from {{\\|Shadowcat}} ===
 
* [[16 nm process|16 nm (16FF+) process]] (from [[28 nm]])
 
* [[16 nm process|16 nm (16FF+) process]] (from [[28 nm]])
* Faster frequency (3.3 GHz, up from 2.8 GHz)
 
* 4x core count (32 cores, up from 8)
 
** 4x processor modules (16 duplexes, up from 4)
 
** Coherent network improved for large core count
 
* 4x L3 (32 MiB, up from 8 MiB)
 
* I/O
 
** {{arm|Generic Interrupt Controller}} (GIC) v3.0 (up from v2.0)
 
** 5.25x more PCIe lanes(42 lanes, up from 8)
 
*** 8 controllers (up from 1)
 
* Memory
 
** 2x memory channels (8 channels, up from 4)
 
*** 2x DIMMs (16 DIMMs, up from 8)
 
*** DDR4 (from DDR4)
 
*** Faster DDR rates (2666 MT/s, up from 1866 MT/s)
 
** 2.86x Higher bandwidth (170.7 GB/s, up from 59.73 GB/s)
 
* Package
 
** 3211-pin (up from 1624)
 
  
 
{{expand list}}
 
{{expand list}}
 
 
== Block Diagram ==
 
== Block Diagram ==
 
=== Entire SoC ===
 
=== Entire SoC ===
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** L3
 
** L3
 
*** 32 MiB
 
*** 32 MiB
*** ECC protected
 
*** Shared by entire chip
 
 
* System [[DRAM]]
 
* System [[DRAM]]
 
** 8 channels
 
** 8 channels
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** Up to DDR4 @ 2666 MT/s
 
** Up to DDR4 @ 2666 MT/s
 
** Up to 1 TiB
 
** Up to 1 TiB
** ECC support,
 
  
== Overview ==
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== Core ==
 
{{empty section}}
 
{{empty section}}
 
== Bibliography ==
 
* AppliedMicro. (June, 2016). personal communication.
 
* Ampere Computing. (February 5, 2018). personal communication.
 
* Ampere Computing. (September 19, 2018). personal communication.
 
* David Schor. (September 19, 2018). "''[https://fuse.wikichip.org/news/1663/ampere-ships-first-gen-arm-server-processors/ Ampere Ships First Gen ARM Server Processors]''".
 

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codenameSkylark +
core count32 +
designerAppliedMicro + and Ampere Computing +
first launched2018 +
full page nameapm/microarchitectures/skylark +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameSkylark +
process16 nm (0.016 μm, 1.6e-5 mm) +