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|predecessor=Skylark | |predecessor=Skylark | ||
|predecessor link=apm/microarchitectures/skylark | |predecessor link=apm/microarchitectures/skylark | ||
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}} | }} | ||
'''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers. | '''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers. | ||
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== Release Dates == | == Release Dates == | ||
[[File:ampere quicksilver roadmap.png|right|400px]] | [[File:ampere quicksilver roadmap.png|right|400px]] | ||
− | + | Quicksilver is planned to be launched sometimes in 2019. | |
== Technology == | == Technology == | ||
− | Quicksilver | + | Quicksilver will be fabricated on [[TSMC]]'s [[7 nm process]]. |
== Architecture == | == Architecture == | ||
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* [[7 nm process]] (from [[16 nm]]) | * [[7 nm process]] (from [[16 nm]]) | ||
* Higher [[IPC]] | * Higher [[IPC]] | ||
− | * Higher core count ( | + | * Higher core count (from [[32-core]]) |
− | * ARMv8.2 | + | * ARMv8.2 support (from ARMv8) |
* Multi-socket support | * Multi-socket support | ||
* Faster memory (3200 MT/s from 2666 MT/s) | * Faster memory (3200 MT/s from 2666 MT/s) | ||
* PCIe 4.0 support (from 3.0) | * PCIe 4.0 support (from 3.0) | ||
* [[CCIX]] connectivity support | * [[CCIX]] connectivity support |
Facts about "Quicksilver - Microarchitectures - Ampere"
codename | Quicksilver + |
designer | Ampere Computing + |
first launched | 2019 + |
full page name | ampere computing/microarchitectures/quicksilver + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.2 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Quicksilver + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |