From WikiChip
Editing amd/ryzen 5

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 12: Line 12:
 
| arch              = mid-range performance x86 processors
 
| arch              = mid-range performance x86 processors
 
| isa              = x86-64
 
| isa              = x86-64
−
| microarch        = Zen 2
+
| microarch        = Zen
 
| word              = 64 bit
 
| word              = 64 bit
−
| proc              = 7 nm
+
| proc              = 14 nm
 
| tech              = CMOS
 
| tech              = CMOS
−
| clock min        = 3,800 MHz
+
| clock min        = 3,200 MHz
−
| clock max        = 4,400 MHz
+
| clock max        = 3,600 MHz
 
| package          = µOPGA-1331
 
| package          = µOPGA-1331
 
| socket            = Socket AM4
 
| socket            = Socket AM4
Line 38: Line 38:
 
Announced in May and introduced in April 2017, the Ryzen 5 processors are mid-range performance processors with [[4 cores|4]] to [[6 cores|6]] cores and multi-threading support. All models have:
 
Announced in May and introduced in April 2017, the Ryzen 5 processors are mid-range performance processors with [[4 cores|4]] to [[6 cores|6]] cores and multi-threading support. All models have:
  
−
* '''Mem:''' Up to 128 GiB of dual-channel 2666 MT/s DDR4 memory
+
* '''Mem:''' Up to 64 GiB of dual-channel 2666 MT/s DDR4 memory
 
* '''TDP:''' 65 W / 95 W
 
* '''TDP:''' 65 W / 95 W
 
* '''ISA:''' Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
 
* '''ISA:''' Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
Line 99: Line 99:
 
-->
 
-->
 
{{comp table start}}
 
{{comp table start}}
−
<table class="comptable sortable tc3 tc4">
+
<table class="comptable sortable tc4 tc5">
−
{{comp table header|main|11:List of Zen-based Ryzen 5 Mobile Processors}}
+
{{comp table header|main|12:List of Zen-based Ryzen 5 Mobile Processors}}
−
{{comp table header|main|7:Processor|2:Integrated Graphics}}
+
{{comp table header|main|8:Processor|2:Integrated Graphics}}
−
{{comp table header|cols|Launched|Cores|Threads|L3$|TDP|Frequency|Turbo|Name|Turbo}}
+
{{comp table header|cols|Price|Launched|Cores|Threads|L3$|TDP|Frequency|Turbo|Name|Turbo}}
 
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen]] [[market segment::Mobile]]
 
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen]] [[market segment::Mobile]]
 
  |?full page name
 
  |?full page name
 
  |?model number
 
  |?model number
 +
|?release price
 
  |?first launched
 
  |?first launched
 
  |?core count
 
  |?core count
Line 117: Line 118:
 
  |format=template
 
  |format=template
 
  |template=proc table 3
 
  |template=proc table 3
−
  |userparam=11
+
  |userparam=12
 
  |mainlabel=-
 
  |mainlabel=-
 
}}
 
}}
Line 127: Line 128:
 
{{see also|amd/microarchitectures/zen+|l1=Zen+ µarch}}
 
{{see also|amd/microarchitectures/zen+|l1=Zen+ µarch}}
 
==== Desktop ====
 
==== Desktop ====
−
Introduced in April 2018, Zen+ based Ryzen 5 processors provide a small [[IPC]] improvement through various memory and cache ennhancements as well as a modest clock frequency improvement over their predecessors. Additionally, all models have:
+
Introduced in April 2018, Zen+ based Ryzen 5 processors provide a small [[IPC]] imprvement through various memory and cache ennhancements as well as a modest clock frequency imprvement over their predecessors. Additionally, all models have:
  
 
* '''Mem:''' Up to 64 GiB of dual-channel 2933 MT/s DDR4 memory
 
* '''Mem:''' Up to 64 GiB of dual-channel 2933 MT/s DDR4 memory
Line 157: Line 158:
 
  |?l3$ size
 
  |?l3$ size
 
  |?base frequency#GHz
 
  |?base frequency#GHz
−
  |?turbo frequency#GHz
+
  |?turbo frequency (1 core)#GHz
 
  |format=template
 
  |format=template
 
  |template=proc table 3
 
  |template=proc table 3
Line 164: Line 165:
 
}}
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen+]][[market segment::Desktop]]}}
 
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen+]][[market segment::Desktop]]}}
−
</table>
 
−
{{comp table end}}
 
−
 
−
==== Mobile ====
 
−
Zen+ based mobile Ryzen 5 processors were introduced in January 2019. These processors feature [[4 cores]] and multi-threading support as well as an integrated graphics processor. They also include the [[IPC]] and clock frequency improvements of the Zen+ architecture compared to the previous Zen processors. All models have:
 
−
 
−
* '''Mem:''' Up to 32 GiB of dual-channel 2400 MT/s DDR4 memory
 
−
* '''TDP:''' 15 W/ 35 W (H models)
 
−
* '''ISA:''' Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
 
−
* '''Tech:''' {{amd|Precision Boost 2}}, {{amd|SMEP}}, 2-way [[SMT]], {{amd|XFR}}, {{amd|AMD-V}}
 
−
 
−
<!-- NOTE:
 
−
          This table is generated automatically from the data in the actual articles.
 
−
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
−
          created and tagged accordingly.
 
−
 
−
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
−
-->
 
−
{{comp table start}}
 
−
<table class="comptable sortable tc3 tc4">
 
−
{{comp table header|main|11:List of Zen+ based Ryzen 5 Mobile Processors}}
 
−
{{comp table header|main|7:Processor|2:Integrated Graphics}}
 
−
{{comp table header|cols|Launched|Cores|Threads|L3$|TDP|Frequency|Turbo|Name|Turbo}}
 
−
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen+]] [[market segment::Mobile]]
 
−
|?full page name
 
−
|?model number
 
−
|?first launched
 
−
|?core count
 
−
|?thread count
 
−
|?l3$ size
 
−
|?tdp
 
−
|?base frequency#GHz
 
−
|?turbo frequency (1 core)#GHz
 
−
|?integrated gpu
 
−
|?integrated gpu max frequency
 
−
|format=template
 
−
|template=proc table 3
 
−
|userparam=11
 
−
|mainlabel=-
 
−
}}
 
−
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]][[microarchitecture::Zen+]][[market segment::Mobile]]}}
 
−
</table>
 
−
{{comp table end}}
 
−
 
−
=== Zen 2 ===
 
−
{{see also|amd/microarchitectures/zen_2|l1=Zen 2 µarch}}
 
−
==== Desktop ====
 
−
Introduced in July 2019, Zen 2 based Ryzen 5 processors provide increased [[IPC]] (AMD self-reported up to 15%) through doubling of the L3 cache, 2x wider FPU datapath, and an improved branch prediction unit. Zen 2 also provided modest clock frequency improvements over Zen+. Additionally, all models have:
 
−
 
−
* '''Mem:''' Up to 128 GiB of dual-channel 3200 MT/s DDR4 memory
 
−
* '''TDP:''' 65 W / 95 W (X models)
 
−
* '''ISA:''' Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
 
−
* '''Tech:''' {{amd|Precision Boost 2}}, {{amd|SMEP}}, 2-way [[SMT]]
 
−
* '''L3$:''' 32 [[MiB]]
 
−
 
−
<!-- NOTE:
 
−
          This table is generated automatically from the data in the actual articles.
 
−
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
−
          created and tagged accordingly.
 
−
 
−
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
−
-->
 
−
{{comp table start}}
 
−
<table class="comptable sortable tc4 tc5 tc15 tc16 tc17">
 
−
{{comp table header|main|11:List of Zen 2 based Ryzen 5 Desktop Processors}}
 
−
{{comp table header 1|cols=Price, Launched, Cores, Threads, TDP, L2$, L3$, Frequency, Max Turbo}}
 
−
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen 2]][[market segment::Desktop]]
 
−
|?full page name
 
−
|?model number
 
−
|?release price
 
−
|?first launched
 
−
|?core count
 
−
|?thread count
 
−
|?tdp
 
−
|?l2$ size
 
−
|?l3$ size
 
−
|?base frequency#GHz
 
−
|?turbo frequency#GHz
 
−
|format=template
 
−
|template=proc table 3
 
−
|userparam=11
 
−
|mainlabel=-
 
−
}}
 
−
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen 2]][[market segment::Desktop]]}}
 
−
</table>
 
−
{{comp table end}}
 
−
 
−
==== Mobile ====
 
−
Zen 2 based mobile Ryzen 5 processors were introduced in January 2020. These processors feature [[6 cores]] as well as an integrated graphics processor. All models have:
 
−
 
−
* '''Mem:''' Support for DDR4-3200 and LPDDR4-4266 memory
 
−
* '''TDP:''' 15 W/ 45 W (H model), configurable TDP
 
−
* '''ISA:''' Everything up to {{x86||AVX2}} (i.e., {{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
 
−
* '''L3$:''' 8 [[MiB]]
 
−
 
−
<!-- NOTE:
 
−
          This table is generated automatically from the data in the actual articles.
 
−
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
−
          created and tagged accordingly.
 
−
 
−
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
−
-->
 
−
{{comp table start}}
 
−
<table class="comptable sortable tc3 tc4">
 
−
{{comp table header|main|11:List of Zen 2 based Ryzen 5 Mobile Processors}}
 
−
{{comp table header|main|7:Processor|2:Integrated Graphics}}
 
−
{{comp table header|cols|Launched|Cores|Threads|L3$|TDP|Frequency|Turbo|Name|Frequency}}
 
−
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen 2]] [[market segment::Mobile]]
 
−
|?full page name
 
−
|?model number
 
−
|?first launched
 
−
|?core count
 
−
|?thread count
 
−
|?l3$ size
 
−
|?tdp
 
−
|?base frequency#GHz
 
−
|?turbo frequency#GHz
 
−
|?integrated gpu
 
−
|?integrated gpu base frequency
 
−
|format=template
 
−
|template=proc table 3
 
−
|userparam=11
 
−
|mainlabel=-
 
−
}}
 
−
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]][[microarchitecture::Zen 2]][[market segment::Mobile]]}}
 
 
</table>
 
</table>
 
{{comp table end}}
 
{{comp table end}}
Line 295: Line 171:
 
* AMD
 
* AMD
 
** {{amd|Zen}}
 
** {{amd|Zen}}
−
** {{amd|Zen+}}
+
** {{amd|Ryzen 7}}
−
** {{amd|Zen 2}}
 
 
** {{amd|Ryzen 3}}
 
** {{amd|Ryzen 3}}
−
** {{amd|Ryzen 7}}
 
−
** {{amd|Ryzen 9}}
 
  
 
* Intel
 
* Intel
 
** {{intel|Core i5}}
 
** {{intel|Core i5}}
 
** {{intel|Skylake}}, {{intel|Kaby Lake}}
 
** {{intel|Skylake}}, {{intel|Kaby Lake}}

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)

Templates used on this page:

Retrieved from "https://en.wikichip.org/wiki/amd/ryzen_5"
Facts about "Ryzen 5 - AMD"
RDF feed
designerAMD +
first announcedMarch 16, 2017 +
first launchedApril 11, 2017 +
full page nameamd/ryzen 5 +
instance ofmicroprocessor family +
instruction set architecturex86-64 +
main designerAMD +
manufacturerGlobalFoundries +
microarchitectureZen 2 +
nameAMD Ryzen 5 +
packageµOPGA-1331 +
process7 nm (0.007 μm, 7.0e-6 mm) +
socketSocket AM4 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +