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{{amd title|Zen 5|arch}}
 
{{amd title|Zen 5|arch}}
 
{{microarchitecture
 
{{microarchitecture
|atype=CPU
+
| atype           = CPU
|name=Zen 5
+
| name             = Zen 5
|designer=AMD
+
| designer         = AMD
|manufacturer=TSMC or Samsung
+
| manufacturer     = GlobalFoundries
|process=3 nm
+
| manufacturer 2   =  
|cores=256
+
| introduction    =  
|cores 2=224
+
| phase-out        =  
|cores 3=192
+
| process          = 5 nm
|cores 4=144
+
 
|cores 5=128
+
| succession      = Yes
|cores 6=96
+
| predecessor     = Zen 3
|cores 7=72
+
| predecessor link = amd/microarchitectures/zen 3
|cores 8=64
+
| successor       =  
|cores 9=56
+
| successor link  =  
|cores 10=48
 
|cores 11=32
 
|cores 12=28
 
|cores 13=36
 
|cores 14=24
 
|cores 15=18
 
|cores 16=12
 
|processing elements=512
 
|processing elements 2=448
 
|processing elements 3=384
 
|processing elements 4=288
 
|processing elements 5=256
 
|processing elements 6=192
 
|processing elements 7=144
 
|processing elements 8=128
 
|processing elements 9=112
 
|processing elements 10=96
 
|processing elements 11=64
 
|processing elements 12=56
 
|processing elements 13=60
 
|processing elements 14=40
 
|processing elements 15=30
 
|processing elements 16=20
 
|type=Superscalar
 
|oooe=Yes
 
|speculative=Yes
 
|renaming=Yes
 
|isa=x86-64
 
|isa 2=AVX512, AMX (Advanced Matrix Extensions)
 
|feature=SHA
 
|feature 2=XFR 3 or 4 ( Extended frequency range)
 
|core name=Turin (EPYC server multiprocessor)
 
|core name 2=Da Vinci (Threadripper Workstation)
 
|core name 3=Granite Ridge (Gaming Desktop CPU)
 
|core name 4=Strix Point (Gaming APU with RDNA3 or RDNA4)
 
|predecessor=Zen 4
 
|predecessor link=amd/microarchitectures/zen 4
 
|successor=Zen 6 or maybe a completely new microarchitecture
 
|succession=Yes
 
 
}}
 
}}
'''Zen 5''' is a planned [[microarchitecture]] being developed by [[AMD]] as a successor to {{\\|Zen 4}}.
+
'''Zen 5''' is a planned [[microarchitecture]] being developed by [[AMD]] as a successor to {{\\|Zen 3}}.
  
 
== History ==
 
== History ==
 
Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018<ref>[https://www.youtube.com/watch?v=iQ_4C2TKHQ0 Ryzen™ Processors: One Year Later]</ref>.
 
Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018<ref>[https://www.youtube.com/watch?v=iQ_4C2TKHQ0 Ryzen™ Processors: One Year Later]</ref>.
 +
 +
It is widely believed to be the fourth iteration of the {{\\|Zen}} microarchitecture, with the designation "Zen4" supposedly being skipped due to [[wikipedia:Tetraphobia|Tetraphobia]] (the practice of avoiding the number four), particularly in China.
 +
It will probably be produced on a [[5nm process]].
  
 
== Codenames ==
 
== Codenames ==
'''Product Codenames:'''
+
{{empty section}}
{| class="wikitable"
 
|-
 
! Core !! C/T !! Target
 
|-
 
| {{amd|Turin|l=core}} || Up to ?/? || High-end server [[multiprocessors]]
 
|-
 
| {{amd|Da Vinci|l=core}} || Up to ?/? || Workstation & enthusiasts market processors
 
|-
 
| {{amd|Granite Ridge|l=core}} || Up to ?/? || Mainstream to high-end desktops & enthusiasts market processors
 
|-
 
| {{amd|Strix Point|l=core}} || Up to ?/? || Mainstream desktop & mobile processors with GPU
 
|}
 
 
 
'''Architectural Codenames:'''
 
{| class="wikitable"
 
|-
 
! Arch !! Codename
 
|-
 
| Core || Nirvana
 
|-
 
| CCD || Eldora
 
|}
 
 
 
== Process Technology ==
 
Zen 5 is speculated to be produced on a [[3nm process]].
 
  
 
== Architecture ==
 
== Architecture ==
Little is currently known about the architectural improvements that are being done to Zen 5.
+
Nothing is currently known about the architectural improvements that are being done to Zen 5.
  
-big.LITTLE design
+
=== Key changes from {{\\|Zen 3}} ===
-More IPC and clock speed
 
- possibly more L3 cache per chiplet
 
 
 
=== Key changes from {{\\|Zen 4}} ===
 
 
{{empty section}}
 
{{empty section}}
  
== Designers ==
+
== References ==
* David Suggs, chief architect
 
 
 
== Bibliography ==
 
 
{{reflist}}
 
{{reflist}}
  
 
== See Also ==
 
== See Also ==
 
* AMD {{\\|Zen}}
 
* AMD {{\\|Zen}}
* Intel {{intel|Meteor Lake|l=arch}}
+
* Intel {{intel|Alder lake|l=arch}}

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codenameZen 5 +
core count256 +, 224 +, 192 +, 144 +, 128 +, 96 +, 72 +, 64 +, 56 +, 48 +, 32 +, 28 +, 36 +, 24 +, 18 + and 12 +
designerAMD +
full page nameamd/microarchitectures/zen 5 +
instance ofmicroarchitecture +
instruction set architecturex86-64 + and AVX512, AMX (Advanced Matrix Extensions) +
manufacturerTSMC or Samsung +
microarchitecture typeCPU +
nameZen 5 +
process3 nm (0.003 μm, 3.0e-6 mm) +
processing element count64 +, 144 +, 512 +, 20 +, 128 +, 96 +, 256 +, 384 +, 288 +, 192 +, 112 +, 56 +, 60 +, 40 +, 30 + and 448 +