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{{amd title|K6-III|arch}} | {{amd title|K6-III|arch}} | ||
{{microarchitecture | {{microarchitecture | ||
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| name = K6-III | | name = K6-III | ||
| designer = AMD | | designer = AMD | ||
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| process = 250 nm | | process = 250 nm | ||
| process 2 = 180 nm | | process 2 = 180 nm | ||
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| succession = Yes | | succession = Yes | ||
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== Technology == | == Technology == | ||
Like it's predecessor, {{\\|K6-2}}, K6-III microarchitecture-based chips were manufactured on AMD's [[0.25 μm process]], a five-layer-metal process technology using local interconnect and shallow trench isolation, at AMD's Fab 25 wafer fabrication facility in Austin, Texas. K6-III is designed using 21.3 million transistors, with the die packaged using C4 flip-chip interconnection technology in a 321-pin ceramic pin grid array (CPGA) package. | Like it's predecessor, {{\\|K6-2}}, K6-III microarchitecture-based chips were manufactured on AMD's [[0.25 μm process]], a five-layer-metal process technology using local interconnect and shallow trench isolation, at AMD's Fab 25 wafer fabrication facility in Austin, Texas. K6-III is designed using 21.3 million transistors, with the die packaged using C4 flip-chip interconnection technology in a 321-pin ceramic pin grid array (CPGA) package. | ||
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== Architecture == | == Architecture == | ||
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<table class="wikitable sortable"> | <table class="wikitable sortable"> | ||
− | <tr><th colspan=" | + | <tr><th colspan="6" style="background:#D6D6FF;">K6-III Chips</th></tr> |
− | <tr><th>Model</th><th>Core</th><th>Launched</th><th>Power Dissipation | + | <tr><th>Model</th><th>Core</th><th>Launched</th><th>Power Dissipation</th><th>Freq</th><th>Max Mem</th></tr> |
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K6-III]] | {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K6-III]] | ||
|?full page name | |?full page name | ||
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|?first launched | |?first launched | ||
|?power dissipation#W | |?power dissipation#W | ||
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|?base frequency#MHz | |?base frequency#MHz | ||
|?max memory#GB | |?max memory#GB | ||
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|template=proc table 2 | |template=proc table 2 | ||
|searchlabel= | |searchlabel= | ||
− | |userparam= | + | |userparam=7 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{table count|col= | + | {{table count|col=6|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K6-III]]}} |
</table> | </table> | ||
Facts about "K6-III - Microarchitectures - AMD"
codename | K6-III + |
designer | AMD + |
first launched | February 22, 1999 + |
full page name | amd/microarchitectures/k6-iii + |
instance of | microarchitecture + |
instruction set architecture | x86-32 + |
manufacturer | AMD + |
microarchitecture type | CPU + |
name | K6-III + |
phase-out | 2000 + |
process | 250 nm (0.25 μm, 2.5e-4 mm) + and 180 nm (0.18 μm, 1.8e-4 mm) + |