Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/k6/amd-k6/233bcz"
(+documents) |
(→Cache) |
||
| Line 76: | Line 76: | ||
== Cache == | == Cache == | ||
{{main|amd/microarchitectures/k6#Memory_Hierarchy|l1=K6 § Cache}} | {{main|amd/microarchitectures/k6#Memory_Hierarchy|l1=K6 § Cache}} | ||
| − | [[L2$]] can be 256 | + | [[L2$]] can be 256 KiB to 1 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. |
{{cache info | {{cache info | ||
| − | |l1i cache=32 | + | |l1i cache=32 KiB |
| − | |l1i break=1x32 | + | |l1i break=1x32 KiB |
|l1i desc=2-way set associative | |l1i desc=2-way set associative | ||
|l1i extra= | |l1i extra= | ||
| − | |l1d cache=32 | + | |l1d cache=32 KiB |
| − | |l1d break=1x32 | + | |l1d break=1x32 KiB |
|l1d desc=2-way set associative | |l1d desc=2-way set associative | ||
|l1d extra= | |l1d extra= | ||
Revision as of 00:18, 21 September 2016
Template:mpu AMD-K6/233BCZ was a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 1998. This chip, which was based on AMD's new K6 microarchitecture, operated at 233 MHz and dissipated a maximum of 9 W.
Contents
Cache
- Main article: K6 § Cache
L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
| L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Documents
DataSheet
- Mobile AMD-K6 Processor Data Sheet; Publication #21049 Revision H/0; September 1999
Facts about "AMD-K6/233BCZ - AMD"
| base frequency | 233.33 MHz (0.233 GHz, 233,330 kHz) + |
| bus rate | 66.66 MT/s (0.0667 GT/s, 66,660 kT/s) + |
| bus speed | 66.66 MHz (0.0667 GHz, 66,660 kHz) + |
| bus type | FSB + |
| clock multiplier | 3.5 + |
| core count | 1 + |
| core family | 5 + |
| core model | 7 + |
| core name | Little Foot + |
| core voltage | 2 V (20 dV, 200 cV, 2,000 mV) + |
| core voltage tolerance | 5% + |
| cpuid | 570 + |
| designer | AMD + |
| die area | 68 mm² (0.105 in², 0.68 cm², 68,000,000 µm²) + |
| family | K6 + |
| first announced | January 1998 + |
| first launched | March 5, 1998 + |
| full page name | amd/k6/amd-k6/233bcz + |
| has locked clock multiplier | false + |
| instance of | microprocessor + |
| io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| io voltage tolerance | 5% + |
| l1d$ description | 2-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| ldate | March 5, 1998 + |
| manufacturer | AMD + |
| market segment | Mobile + |
| max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| max storage temperature | 423.15 K (150 °C, 302 °F, 761.67 °R) + |
| microarchitecture | K6 + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
| model number | AMD-K6/233BCZ + |
| name | AMD-K6/233BCZ + |
| package | CBGA-360 + |
| part number | AMD-K6/233BCZ + |
| power dissipation | 9 W (9,000 mW, 0.0121 hp, 0.009 kW) + |
| process | 250 nm (0.25 μm, 2.5e-4 mm) + |
| series | Mobile K6 + |
| smp max ways | 1 + |
| technology | CMOS + |
| thread count | 1 + |
| transistor count | 8,800,000 + |
| word size | 32 bit (4 octets, 8 nibbles) + |
