From WikiChip
Difference between revisions of "amd/k6-2/k6-2-475ahx"
< amd‎ | k6-2

m (Bot: corrected param)
m (Bot: moving all {{mpu}} to {{chip}})
 
(One intermediate revision by the same user not shown)
Line 1: Line 1:
 
{{amd title|K6-2/475AHX}}
 
{{amd title|K6-2/475AHX}}
{{mpu
+
{{chip
 
| name                = K6-2/475AHX
 
| name                = K6-2/475AHX
 
| no image            = No
 
| no image            = No
Line 104: Line 104:
  
 
== Features ==
 
== Features ==
{{mpu features
+
{{x86 features
 
| mmx  = true
 
| mmx  = true
 
| 3dnow = true
 
| 3dnow = true

Latest revision as of 16:08, 13 December 2017

Edit Values
K6-2/475AHX
General Info
DesignerAMD
ManufacturerAMD
Model NumberK6-2/475AHX
Part NumberAMD-K6-2/475AHX
MarketDesktop
IntroductionApril 15, 1999 (announced)
April 15, 1999 (launched)
ShopAmazon
General Specs
FamilyK6-2
SeriesK6-2 Desktop
Frequency475 MHz
Bus typeFSB
Bus speed95 MHz
Bus rate95 MT/s
Clock multiplier5
CPUID58C
Microarchitecture
MicroarchitectureK6-2
PlatformSuper 7
Core NameChomper Extended
Core Family5
Core Model8
Core Stepping12
Process0.25 µm
Transistors9,300,000
TechnologyCMOS
Die81 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation29.6 W
Vcore2.4 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 65 °C
Tstorage-65 °C – 150 °C

K6-2/475AHX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 475 MHz with a FSB of 95 MHz consumed 29.6 W.

Cache[edit]

Main article: K6-2 § Cache

L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

  • Auto-power down state
  • Stop clock state

Documents[edit]

DataSheet[edit]

Facts about "K6-2/475AHX - AMD"
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +