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Latest revision Your text
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|family=EPYC Embedded
 
|family=EPYC Embedded
 
|series=3000
 
|series=3000
−
|locked=Yes
 
 
|frequency=1,850 MHz
 
|frequency=1,850 MHz
 
|turbo frequency1=3,000 MHz
 
|turbo frequency1=3,000 MHz
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|core family=23
 
|core family=23
 
|core model=1
 
|core model=1
−
|core stepping=B2
 
−
|cpuid=0x00800F12
 
 
|process=14 nm
 
|process=14 nm
 
|transistors=9,600,000,000
 
|transistors=9,600,000,000
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|package name 1=amd,sp4
 
|package name 1=amd,sp4
 
}}
 
}}
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'''EPYC Embedded 3401''' is a {{arch|64}} [[16-core]] [[x86]] embedded microprocessor introduced by [[AMD]] in early [[2018]] for dense servers and edge devices. This [[multi-chip package|multi-chip processor]] has CPU cores based on the {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[GlobalFoundries]] [[14 nm#GlobalFoundries|14 nm]] process. It operates at 1.85 GHz with a {{abbr|TDP}} of 85 W and a {{amd|precision boost|turbo frequency}} of up to 3.0 GHz. The 3401 supports up to 1 TiB of quad-channel DDR4-2666 memory.
+
'''EPYC Embedded 3401''' is a {{arch|64}} [[hexadeca-core]] [[x86]] embedded microprocessor introduced by [[AMD]] in early [[2018]] for dense servers and edge devices. Fabricated on a [[14 nm process]] based on the {{amd|Zen|Zen microarchitecture|l=arch}}, this chip operates at 1.85 GHz with a TDP of 85 W and a {{amd|precision boost|turbo frequency}} of up to 3 GHz. The 3401 supports up to 1 TiB of quad-channel DDR4-2666 memory.
  
−
This model was apparently canceled.
 
  
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
 
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
 
{{cache size
 
{{cache size
−
|l1 cache=1536 KiB
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|l1 cache=1.5 MiB
 
|l1i cache=1 MiB
 
|l1i cache=1 MiB
−
|l1i break=16 × 64 KiB
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|l1i break=16x64 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
 
|l1d cache=512 KiB
 
|l1d cache=512 KiB
−
|l1d break=16 × 32 KiB
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|l1d break=16x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d policy=write-back
 
|l1d policy=write-back
 
|l2 cache=8 MiB
 
|l2 cache=8 MiB
−
|l2 break=16 × 512 KiB
+
|l2 break=16x512 KiB
 
|l2 desc=8-way set associative
 
|l2 desc=8-way set associative
 
|l2 policy=write-back
 
|l2 policy=write-back
 
|l3 cache=32 MiB
 
|l3 cache=32 MiB
−
|l3 break=4 × 8 MiB
+
|l3 break=4x8 MiB
 
|l3 desc=16-way set associative
 
|l3 desc=16-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
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|controllers=4
 
|controllers=4
 
|channels=4
 
|channels=4
−
|max bandwidth=85.33 GB/s
+
|max bandwidth=79.47 GiB/s
−
|bandwidth schan=21.33 GB/s
+
|bandwidth schan=19.87 GiB/s
−
|bandwidth dchan=42.67 GB/s
+
|bandwidth dchan=39.74 GiB/s
−
|bandwidth qchan=85.33 GB/s
+
|bandwidth qchan=79.47 GiB/s
 
}}
 
}}
  
 +
{{amd ryzen threadripper memory configs}}
 
== Expansions ==
 
== Expansions ==
−
The EPYC Embedded 3401 integrates four 8-port, 16-lane PCIe Gen 1/2/3 (8 GT/s) controllers. All lanes are configurable as x16/x8/x4/x2/x1 wide (e.g. 1x4 + 4x1 + 1x8) PCIe links, some lanes alternatively as SATA Gen 1/2/3 (6 Gb/s) or 10 Gbit/s Ethernet ports. Up to sixteen SATA ports and eight GbE ports are available on this model, as well as four USB 3.1 Gen 1 (5 Gb/s) ports, and the following low speed interfaces: {{abbr|eMMC}}, {{abbr|UART}}, {{abbr|LPC}}, {{abbr|SPI/eSPI}}, {{abbr|I<sup>2</sup>C}}, {{abbr|SMBus}}, {{abbr|GPIO}}.
+
The EPYC Embedded 3401 has 64 PCIe lanes that are MUX'ed with a number of other ports and can be reconfigured as either SATA ports (up to 16 such ports), or as GbE ports (up to 10 such ports), or any mixed configuration of those options.
−
 
 
 
{{expansions main
 
{{expansions main
 
|
 
|
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|pcie config 3=x4
 
|pcie config 3=x4
 
|pcie config 4=x2
 
|pcie config 4=x2
−
|pcie config 5=x1
 
−
}}
 
−
{{expansions entry
 
−
|type=USB
 
−
|usb revision=3.1
 
−
|usb ports=4
 
 
}}
 
}}
 
{{expansions entry
 
{{expansions entry
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|eth opts=Yes
 
|eth opts=Yes
 
|10ge=Yes
 
|10ge=Yes
−
|10ge ports=8
+
|10ge ports=10
 
}}
 
}}
  
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|sse42=Yes
 
|sse42=Yes
 
|sse4a=Yes
 
|sse4a=Yes
−
|sse_gfni=No
 
 
|avx=Yes
 
|avx=Yes
−
|avx_gfni=No
 
 
|avx2=Yes
 
|avx2=Yes
−
|avx512f=No
+
 
−
|avx512cd=No
 
−
|avx512er=No
 
−
|avx512pf=No
 
−
|avx512bw=No
 
−
|avx512dq=No
 
−
|avx512vl=No
 
−
|avx512ifma=No
 
−
|avx512vbmi=No
 
−
|avx5124fmaps=No
 
−
|avx512vnni=No
 
−
|avx5124vnniw=No
 
−
|avx512vpopcntdq=No
 
−
|avx512gfni=No
 
−
|avx512vaes=No
 
−
|avx512vbmi2=No
 
−
|avx512bitalg=No
 
−
|avx512vpclmulqdq=No
 
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
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|clmul=Yes
 
|clmul=Yes
 
|f16c=Yes
 
|f16c=Yes
−
|bfloat16=No
 
 
|tbt1=No
 
|tbt1=No
 
|tbt2=No
 
|tbt2=No
 
|tbmt3=No
 
|tbmt3=No
−
|tvb=No
 
 
|bpt=No
 
|bpt=No
 
|eist=No
 
|eist=No
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|flex=No
 
|flex=No
 
|fastmem=No
 
|fastmem=No
−
|ivmd=No
 
−
|intelnodecontroller=No
 
−
|intelnode=No
 
−
|kpt=No
 
−
|ptt=No
 
−
|intelrunsure=No
 
−
|mbe=No
 
 
|isrt=No
 
|isrt=No
 
|sba=No
 
|sba=No
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|securekey=No
 
|securekey=No
 
|osguard=No
 
|osguard=No
−
|intqat=No
 
−
|dlboost=No
 
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No
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|amdsev=Yes
 
|amdsev=Yes
 
|rvi=No
 
|rvi=No
−
|smt=No
+
|smt=Yes
 
|sensemi=Yes
 
|sensemi=Yes
 
|xfr=No
 
|xfr=No
−
|xfr2=No
 
−
|mxfr=No
 
−
|amdpb=No
 
−
|amdpb2=No
 
−
|amdpbod=No
 
 
}}
 
}}
−
 
−
== Bibliography ==
 
−
* {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|file=3000-Family-Product-Brief.pdf|publ=AMD|pid=1887102|date=2018}}
 
−
* {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|url=https://www.amd.com/system/files/documents/updated-3000-family-product-brief.pdf|publ=AMD|pid=1887102|rev=E|date=2019}}
 
−
* [https://www.amd.com/en/products/specifications/embedded "Embedded Processor Specifications"]. AMD.com. Retrieved October 2020.
 

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EPYC Embedded 3401 - AMD#pcie +
base frequency1,850 MHz (1.85 GHz, 1,850,000 kHz) +
clock multiplier18.5 +
core count16 +
core family23 +
core model1 +
core nameSnowy Owl +
core steppingB2 +
cpuid0x00800F12 +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
die count2 +
familyEPYC Embedded +
first announcedFebruary 21, 2018 +
first launchedFebruary 21, 2018 +
full page nameamd/epyc embedded/3401 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd secure encrypted virtualization technologytrue +
has amd secure memory encryption technologytrue +
has amd sensemi technologytrue +
has amd transparent secure memory encryption technologytrue +
has ecc memory supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 + and SenseMI Technology +
has locked clock multipliertrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size1,536 KiB (1,572,864 B, 1.5 MiB) +
l1d$ description8-way set associative +
l1d$ size512 KiB (524,288 B, 0.5 MiB) +
l1i$ description4-way set associative +
l1i$ size1,024 KiB (1,048,576 B, 1 MiB) +
l2$ description8-way set associative +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ description16-way set associative +
l3$ size32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldateFebruary 21, 2018 +
manufacturerGlobalFoundries +
market segmentEmbedded + and Server +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth79.47 GiB/s (81,377.029 MiB/s, 85.33 GB/s, 85,330 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels4 +
max sata ports16 +
max usb ports4 +
microarchitectureZen +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number3401 +
nameEPYC Embedded 3401 +
packageSP4 +
process14 nm (0.014 μm, 1.4e-5 mm) +
series3000 +
smp max ways1 +
supported memory typeDDR4-2666 +
tdp85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technologyCMOS +
thread count16 +
transistor count9,600,000,000 +
turbo frequency (16 cores)2,250 MHz (2.25 GHz, 2,250,000 kHz) +
turbo frequency (1 core)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +